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altivec.md (xorv4sf3): New.

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* config/rs6000/altivec.md (xorv4sf3): New.
        (negv4sf2, neg<mode>2): Likewise.

From-SVN: r103335
This commit is contained in:
Ira Rosen 2005-08-22 08:13:18 +00:00 • committed by Ira Rosen
parent 85199961c5
commit 70a39602ab
4 changed files with 78 additions and 1 deletions
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5
gcc/ChangeLog
View file

@ -1,3 +1,8 @@
2005-08-22 Ira Rosen <irar@il.ibm.com>
* config/rs6000/altivec.md (xorv4sf3): New.
(negv4sf2, neg<mode>2): Likewise.
2005-08-21 H.J. Lu <hongjiu.lu@intel.com>
PR target/23485

42
gcc/config/rs6000/altivec.md
View file

@ -1039,6 +1039,14 @@
"vxor %0,%1,%2"
[(set_attr "type" "vecsimple")])
(define_insn "xorv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=v")
(xor:V4SF (match_operand:V4SF 1 "register_operand" "v")
(match_operand:V4SF 2 "register_operand" "v")))]
"TARGET_ALTIVEC"
"vxor %0,%1,%2"
[(set_attr "type" "vecsimple")])
(define_insn "one_cmpl<mode>2"
[(set (match_operand:VI 0 "register_operand" "=v")
(not:VI (match_operand:VI 1 "register_operand" "v")))]
@ -2161,3 +2169,37 @@
"TARGET_ALTIVEC"
"vperm %0,%1,%2,%3"
[(set_attr "type" "vecperm")])
(define_expand "neg<mode>2"
[(use (match_operand:VI 0 "register_operand" ""))
(use (match_operand:VI 1 "register_operand" ""))]
"TARGET_ALTIVEC"
"
{
rtx vzero;
vzero = gen_reg_rtx (GET_MODE (operands[0]));
emit_insn (gen_altivec_vspltis<VI_char> (vzero, const0_rtx));
emit_insn (gen_sub<mode>3 (operands[0], vzero, operands[1]));
DONE;
}")
(define_expand "negv4sf2"
[(use (match_operand:V4SF 0 "register_operand" ""))
(use (match_operand:V4SF 1 "register_operand" ""))]
"TARGET_ALTIVEC"
"
{
rtx neg0;
/* Generate [-0.0, -0.0, -0.0, -0.0]. */
neg0 = gen_reg_rtx (V4SFmode);
emit_insn (gen_altivec_vspltisw_v4sf (neg0, constm1_rtx));
emit_insn (gen_altivec_vslw_v4sf (neg0, neg0, neg0));
/* XOR */
emit_insn (gen_xorv4sf3 (operands[0], neg0, operands[1]));
DONE;
}")

5
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,8 @@
2005-08-22 Ira Rosen <irar@il.ibm.com>
* gcc.dg/vect/vect-22.c: Add test for float. All four loops
are vectorizable.
2005-08-21 Tobias Schl"uter <tobias.schlueter@physik.uni-muenchen.de>
* d_lines_1.f, d_lines_2.f, d_lines_3.f, d_lines_4.f,

27
gcc/testsuite/gcc.dg/vect/vect-22.c
View file

@ -42,6 +42,17 @@ main1 ()
1,1,0,0,1,0,1,0,
1,1,0,0,1,0,1,0};
float fa[N];
float fb[N] =
{1,1,0,0,1,0,1,0,
1,1,0,0,1,0,1,0,
1,1,0,0,1,0,1,0,
1,1,0,0,1,0,1,0,
1,1,0,0,1,0,1,0,
1,1,0,0,1,0,1,0,
1,1,0,0,1,0,1,0,
1,1,0,0,1,0,1,0};
/* Check ints. */
for (i = 0; i < N; i++)
@ -84,6 +95,20 @@ main1 ()
abort ();
}
/* Check floats. */
for (i = 0; i < N; i++)
{
fa[i] = -fb[i];
}
/* check results: */
for (i = 0; i <N; i++)
{
if (fa[i] != -fb[i])
abort ();
}
return 0;
}
@ -94,7 +119,7 @@ int main (void)
return main1 ();
}
/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail *-*-* } } } */
/* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
/* { dg-final { cleanup-tree-dump "vect" } } */