diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 72e707a6ed5..2ed1b63f989 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2013-11-18  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+	* gcc/config/ia64/ia64.c (ia64_split_tmode_move): Mark
+	load with `dead' flag if it kills address, not its
+	post-increment.
+
 2013-11-18  Ilya Enkovich  <ilya.enkovich@intel.com>
 
 	* builtin-types.def (BT_FN_PTR_CONST_PTR_VAR): New.
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index e6bd96df881..4fde7aab43e 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -1525,23 +1525,22 @@ ia64_split_tmode_move (rtx operands[])
      the value it points to.  In that case we have to do the loads in
      the appropriate order so that the pointer is not destroyed too
      early.  Also we must not generate a postmodify for that second
-     load, or rws_access_regno will die.  */
+     load, or rws_access_regno will die.  And we must not generate a
+     postmodify for the second load if the destination register 
+     overlaps with the base register.  */
   if (GET_CODE (operands[1]) == MEM
       && reg_overlap_mentioned_p (operands[0], operands[1]))
     {
       rtx base = XEXP (operands[1], 0);
-      rtx first_write = gen_rtx_REG (DImode, REGNO (operands[0]));
       while (GET_CODE (base) != REG)
 	base = XEXP (base, 0);
 
       if (REGNO (base) == REGNO (operands[0]))
-	{
-	  reversed = true;
-	  first_write = gen_rtx_REG (DImode, REGNO (operands[0]) + 1);
-	}
+	reversed = true;
 
-      if (GET_CODE (operands[0]) == REG
-	  && reg_overlap_mentioned_p (first_write, operands[1]))
+      if (refers_to_regno_p (REGNO (operands[0]),
+			     REGNO (operands[0])+2,
+			     base, 0))
 	dead = true;
     }
   /* Another reason to do the moves in reversed order is if the first