PR middle-end/89797 - ICE on a vector_size (1LU << 33) int variable
gcc/ChangeLog: * tree.h (TYPE_VECTOR_SUBPARTS): Use HOST_WIDE_INT_1U. * config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Avoid assuming type size fits in SHWI. From-SVN: r270447
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3 changed files with 11 additions and 5 deletions
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@ -1,3 +1,10 @@
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2019-04-18 Martin Sebor <msebor@redhat.com>
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PR middle-end/89797
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* tree.h (TYPE_VECTOR_SUBPARTS): Use HOST_WIDE_INT_1U.
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* config/aarch64/aarch64.c (aarch64_simd_vector_alignment): Avoid
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assuming type size fits in SHWI.
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2019-04-18 Jan Hubicka <hubicka@ucw.cz>
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PR ipa/85051
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@ -14924,8 +14924,7 @@ aarch64_simd_vector_alignment (const_tree type)
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be set for non-predicate vectors of booleans. Modes are the most
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direct way we have of identifying real SVE predicate types. */
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return GET_MODE_CLASS (TYPE_MODE (type)) == MODE_VECTOR_BOOL ? 16 : 128;
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HOST_WIDE_INT align = tree_to_shwi (TYPE_SIZE (type));
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return MIN (align, 128);
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return wi::umin (wi::to_wide (TYPE_SIZE (type)), 128).to_uhwi ();
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}
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/* Implement target hook TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT. */
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@ -3735,13 +3735,13 @@ TYPE_VECTOR_SUBPARTS (const_tree node)
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if (NUM_POLY_INT_COEFFS == 2)
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{
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poly_uint64 res = 0;
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res.coeffs[0] = 1 << (precision & 0xff);
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res.coeffs[0] = HOST_WIDE_INT_1U << (precision & 0xff);
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if (precision & 0x100)
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res.coeffs[1] = 1 << (precision & 0xff);
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res.coeffs[1] = HOST_WIDE_INT_1U << (precision & 0xff);
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return res;
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}
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else
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return (unsigned HOST_WIDE_INT)1 << precision;
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return HOST_WIDE_INT_1U << precision;
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}
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/* Set the number of elements in VECTOR_TYPE NODE to SUBPARTS, which must
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