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vsx.md (vextract_fp_from_shorth, [...]): Add BE support.

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gcc/ChangeLog:

2018-06-07  Carl Love  <cel@us.ibm.com>

	* gcc/config/rs6000/vsx.md (vextract_fp_from_shorth,
	vextract_fp_from_shortl): Add BE support.

gcc/testsuite/ChangeLog:

2018-06-07  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-3-p9-runnable.c: Add debug print
	statements.

From-SVN: r261299
This commit is contained in:
Carl Love 2018-06-07 22:57:07 +00:00 • committed by Carl Love
parent 07e2ef97f9
commit 6ad1bf184b
4 changed files with 56 additions and 8 deletions
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5
gcc/ChangeLog
View file

@ -1,3 +1,8 @@
2018-06-07 Carl Love <cel@us.ibm.com>
* gcc/config/rs6000/vsx.md (vextract_fp_from_shorth,
vextract_fp_from_shortl): Add BE support.
2018-06-07 Paul Koning <ni1d@arrl.net>
* compare-elim.c (try_merge_compare): Don't merge compare if

23
gcc/config/rs6000/vsx.md
View file

@ -5214,8 +5214,9 @@
UNSPEC_VSX_VEXTRACT_FP_FROM_SHORTH))]
"TARGET_P9_VECTOR"
{
int vals[16] = {15, 14, 0, 0, 13, 12, 0, 0, 11, 10, 0, 0, 9, 8, 0, 0};
int i;
int vals_le[16] = {15, 14, 0, 0, 13, 12, 0, 0, 11, 10, 0, 0, 9, 8, 0, 0};
int vals_be[16] = {7, 6, 0, 0, 5, 4, 0, 0, 3, 2, 0, 0, 1, 0, 0, 0};
rtx rvals[16];
rtx mask = gen_reg_rtx (V16QImode);
@ -5223,11 +5224,15 @@
rtvec v;
for (i = 0; i < 16; i++)
rvals[i] = GEN_INT (vals[i]);
if (!BYTES_BIG_ENDIAN)
rvals[i] = GEN_INT (vals_le[i]);
else
rvals[i] = GEN_INT (vals_be[i]);
/* xvcvhpsp - vector convert F16 to vector F32 requires the four F16
inputs in half words 1,3,5,7 (IBM numbering). Use xxperm to move
src half words 0,1,2,3 for the conversion instruction. */
src half words 0,1,2,3 (LE), src half words 4,5,6,7 (BE) for the
conversion instruction. */
v = gen_rtvec_v (16, rvals);
emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
emit_insn (gen_altivec_vperm_v8hiv16qi (tmp, operands[1],
@ -5244,7 +5249,9 @@
UNSPEC_VSX_VEXTRACT_FP_FROM_SHORTL))]
"TARGET_P9_VECTOR"
{
int vals[16] = {7, 6, 0, 0, 5, 4, 0, 0, 3, 2, 0, 0, 1, 0, 0, 0};
int vals_le[16] = {7, 6, 0, 0, 5, 4, 0, 0, 3, 2, 0, 0, 1, 0, 0, 0};
int vals_be[16] = {15, 14, 0, 0, 13, 12, 0, 0, 11, 10, 0, 0, 9, 8, 0, 0};
int i;
rtx rvals[16];
rtx mask = gen_reg_rtx (V16QImode);
@ -5252,11 +5259,15 @@
rtvec v;
for (i = 0; i < 16; i++)
rvals[i] = GEN_INT (vals[i]);
if (!BYTES_BIG_ENDIAN)
rvals[i] = GEN_INT (vals_le[i]);
else
rvals[i] = GEN_INT (vals_be[i]);
/* xvcvhpsp - vector convert F16 to vector F32 requires the four F16
inputs in half words 1,3,5,7 (IBM numbering). Use xxperm to move
src half words 4,5,6,7 for the conversion instruction. */
src half words 4,5,6,7 (LE), src half words 0,1,2,3 (BE) for the
conversion instruction. */
v = gen_rtvec_v (16, rvals);
emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
emit_insn (gen_altivec_vperm_v8hiv16qi (tmp, operands[1],

5
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,8 @@
2018-06-07 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-3-p9-runnable.c: Add debug print
statements.
2018-06-07 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/vsu/vec-cntlz-lsbb-2.c (dg-error): Update expected

31
gcc/testsuite/gcc.target/powerpc/builtins-3-p9-runnable.c
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@ -2,6 +2,10 @@
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
/* { dg-options "-mcpu=power9 -O2" } */
#ifdef DEBUG
#include <stdio.h>
#endif
#include <altivec.h> // vector
void abort (void);
@ -16,10 +20,26 @@ int main() {
0B000000000000000, 0B0100100001000000,
0B011111000000000, 0B0011100000000000,
0B011110100000000, 0B1011010000000000};
#ifdef DEBUG
printf ("Claim, source data is 8 16-bit floats:\n");
printf (" {1.0, -2.0, 0.0, 8.5, 1.5, 0.5, 1.25, -0.25}\n");
printf ("vusha = (vector unsigned short){0B011110000000000, 0B1100000000000000,\n");
printf (" 0B000000000000000, 0B0100100001000000,\n");
printf (" 0B011111000000000, 0B0011100000000000,\n");
printf (" 0B011110100000000, 0B1011010000000000};\n\n");
#endif
vfexpt = (vector float){1.0, -2.0, 0.0, 8.5};
vfr = vec_extract_fp_from_shorth(vusha);
#ifdef DEBUG
printf ("vec_extract_fp_from_shorth\n");
for (i=0; i<4; i++)
printf("result[%d] = %f; expected[%d] = %f\n",
i, vfr[i], i, vfexpt[i]);
#endif
for (i=0; i<4; i++) {
if (vfr[i] != vfexpt[i])
abort();
@ -28,7 +48,14 @@ int main() {
vfexpt = (vector float){1.5, 0.5, 1.25, -0.25};
vfr = vec_extract_fp_from_shortl(vusha);
for (i=0; i<4; i++) {
#ifdef DEBUG
printf ("\nvec_extract_fp_from_shortl\n");
for (i=0; i<4; i++)
printf("result[%d] = %f; expected[%d] = %f\n",
i, vfr[i], i, vfexpt[i]);
#endif
for (i=0; i<4; i++) {
if (vfr[i] != vfexpt[i])
abort();
}