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Add TARGET_FUSED_MADD to FMA4 insns.

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* config/i386/i386.c (TARGET_DEFAULT_TARGET_FLAGS): Add
	MASK_FUSED_MADD.
	* config/i386/i386.h (CC1_CPU_SPEC_1): Remove
	"'-mfused-madd' was removed".
	* config/i386/i386.opt (mfused-madd): New.
	* config/i386/sse.md: Add TARGET_FUSED_MADD to FMA4 insns.
	* doc/invoke.texi (-mfused-madd, -mno-fused-madd): Document.

From-SVN: r155015
This commit is contained in:
Sebastian Pop 2009-12-05 20:11:52 +00:00 • committed by Sebastian Pop
parent 70d60e8801
commit 6a790a6980
6 changed files with 107 additions and 45 deletions
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10
gcc/ChangeLog
View file

@ -1,3 +1,13 @@
2009-12-05 Sebastian Pop <sebastian.pop@amd.com>
* config/i386/i386.c (TARGET_DEFAULT_TARGET_FLAGS): Add
MASK_FUSED_MADD.
* config/i386/i386.h (CC1_CPU_SPEC_1): Remove
"'-mfused-madd' was removed".
* config/i386/i386.opt (mfused-madd): New.
* config/i386/sse.md: Add TARGET_FUSED_MADD to FMA4 insns.
* doc/invoke.texi (-mfused-madd, -mno-fused-madd): Document.
2009-12-05 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
* pa64-hpux.h (LIB_SPEC): Handle -rdynamic.

3
gcc/config/i386/i386.c
View file

@ -30307,7 +30307,8 @@ ix86_enum_va_list (int idx, const char **pname, tree *ptree)
#define TARGET_DEFAULT_TARGET_FLAGS \
(TARGET_DEFAULT \
| TARGET_SUBTARGET_DEFAULT \
| TARGET_TLS_DIRECT_SEG_REFS_DEFAULT)
| TARGET_TLS_DIRECT_SEG_REFS_DEFAULT \
| MASK_FUSED_MADD)
#undef TARGET_HANDLE_OPTION
#define TARGET_HANDLE_OPTION ix86_handle_option

2
gcc/config/i386/i386.h
View file

@ -546,8 +546,6 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \
%{msse5:-mavx \
%n'-msse5' was removed.\n} \
%{mfused-madd:-mavx \
%n'-mfused-madd' was removed.\n} \
%{mno-intel-syntax:-masm=att \
%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}"

6
gcc/config/i386/i386.opt
View file

@ -244,6 +244,12 @@ mcld
Target Report Mask(CLD) Save
Generate cld instruction in the function prologue.
mfused-madd
Target Report Mask(FUSED_MADD) Save
Enable automatic generation of fused floating point multiply-add instructions
if the ISA supports such instructions. The -mfused-madd option is on by
default.
;; ISA support
m32

120
gcc/config/i386/sse.md
View file

@ -1709,7 +1709,8 @@
(match_operand:FMA4MODEF4 1 "register_operand" "%x,x")
(match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))
(match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x")))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmadd<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1741,7 +1742,8 @@
(match_operand:FMA4MODEF4 1 "register_operand" "%x,x")
(match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))
(match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x")))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsub<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1775,7 +1777,8 @@
(mult:FMA4MODEF4
(match_operand:FMA4MODEF4 1 "register_operand" "%x,x")
(match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmadd<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1809,7 +1812,8 @@
(match_operand:FMA4MODEF4 1 "register_operand" "%x,x"))
(match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))
(match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x")))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmsub<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1843,7 +1847,8 @@
(match_operand:SSEMODEF4 1 "register_operand" "%x,x")
(match_operand:SSEMODEF4 2 "nonimmediate_operand" "x,m"))
(match_operand:SSEMODEF4 3 "nonimmediate_operand" "xm,x")))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmadd<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1879,7 +1884,8 @@
(match_operand:SSEMODEF2P 3 "nonimmediate_operand" "xm,x"))
(match_dup 0)
(const_int 1)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmadd<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1893,7 +1899,8 @@
(match_operand:SSEMODEF4 1 "register_operand" "%x,x")
(match_operand:SSEMODEF4 2 "nonimmediate_operand" "x,m"))
(match_operand:SSEMODEF4 3 "nonimmediate_operand" "xm,x")))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsub<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1929,7 +1936,8 @@
(match_operand:SSEMODEF2P 3 "nonimmediate_operand" "xm,x"))
(match_dup 0)
(const_int 1)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsub<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1945,7 +1953,8 @@
(mult:SSEMODEF4
(match_operand:SSEMODEF4 1 "register_operand" "%x,x")
(match_operand:SSEMODEF4 2 "nonimmediate_operand" "x,m"))))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmadd<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1981,7 +1990,8 @@
(match_operand:SSEMODEF2P 2 "nonimmediate_operand" "x,m")))
(match_dup 0)
(const_int 1)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmadd<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -1997,7 +2007,8 @@
(match_operand:SSEMODEF4 1 "register_operand" "%x,x"))
(match_operand:SSEMODEF4 2 "nonimmediate_operand" "x,m"))
(match_operand:SSEMODEF4 3 "nonimmediate_operand" "xm,x")))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmsub<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2037,7 +2048,8 @@
(match_operand:SSEMODEF2P 3 "nonimmediate_operand" "xm,x"))
(match_dup 0)
(const_int 1)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmsub<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2053,7 +2065,8 @@
(match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))
(match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x"))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmadd<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2067,7 +2080,8 @@
(match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))
(match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x"))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsub<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2081,7 +2095,8 @@
(match_operand:FMA4MODEF4 1 "register_operand" "%x,x")
(match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m")))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmadd<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2096,7 +2111,8 @@
(match_operand:FMA4MODEF4 2 "nonimmediate_operand" "x,m"))
(match_operand:FMA4MODEF4 3 "nonimmediate_operand" "xm,x"))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmsub<fma4modesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2111,7 +2127,8 @@
(match_operand:SSEMODEF2P 2 "nonimmediate_operand" "x,m"))
(match_operand:SSEMODEF2P 3 "nonimmediate_operand" "xm,x"))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmadd<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2125,7 +2142,8 @@
(match_operand:SSEMODEF2P 2 "nonimmediate_operand" "x,m"))
(match_operand:SSEMODEF2P 3 "nonimmediate_operand" "xm,x"))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsub<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2139,7 +2157,8 @@
(match_operand:SSEMODEF2P 1 "register_operand" "%x,x")
(match_operand:SSEMODEF2P 2 "nonimmediate_operand" "x,m")))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmadd<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2154,7 +2173,8 @@
(match_operand:SSEMODEF2P 2 "nonimmediate_operand" "x,m"))
(match_operand:SSEMODEF2P 3 "nonimmediate_operand" "xm,x"))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmsub<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<MODE>")])
@ -2173,7 +2193,8 @@
(match_dup 0)
(const_int 1))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmadd<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<ssescalarmode>")])
@ -2190,7 +2211,8 @@
(match_dup 0)
(const_int 1))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsub<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<ssescalarmode>")])
@ -2207,7 +2229,8 @@
(match_dup 0)
(const_int 1))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmadd<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<ssescalarmode>")])
@ -2225,7 +2248,8 @@
(match_dup 0)
(const_int 1))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfnmsub<ssemodesuffixf2s>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "<ssescalarmode>")])
@ -2250,7 +2274,8 @@
(match_dup 2))
(match_dup 3))
(const_int 170)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmaddsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V8SF")])
@ -2269,7 +2294,8 @@
(match_dup 2))
(match_dup 3))
(const_int 10)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmaddsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V4DF")])
@ -2288,7 +2314,8 @@
(match_dup 2))
(match_dup 3))
(const_int 10)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmaddsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V4SF")])
@ -2307,7 +2334,8 @@
(match_dup 2))
(match_dup 3))
(const_int 2)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmaddsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V2DF")])
@ -2326,7 +2354,8 @@
(match_dup 2))
(match_dup 3))
(const_int 85)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsubaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V8SF")])
@ -2345,7 +2374,8 @@
(match_dup 2))
(match_dup 3))
(const_int 5)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsubaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V4DF")])
@ -2364,7 +2394,8 @@
(match_dup 2))
(match_dup 3))
(const_int 5)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsubaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V4SF")])
@ -2383,7 +2414,8 @@
(match_dup 2))
(match_dup 3))
(const_int 1)))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsubaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V2DF")])
@ -2406,7 +2438,8 @@
(match_dup 3))
(const_int 170))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmaddsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V8SF")])
@ -2427,7 +2460,8 @@
(match_dup 3))
(const_int 10))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmaddsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V4DF")])
@ -2448,7 +2482,8 @@
(match_dup 3))
(const_int 10))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmaddsubps\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V4SF")])
@ -2469,7 +2504,8 @@
(match_dup 3))
(const_int 2))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmaddsubpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V2DF")])
@ -2490,7 +2526,8 @@
(match_dup 3))
(const_int 85))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsubaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V8SF")])
@ -2511,7 +2548,8 @@
(match_dup 3))
(const_int 5))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsubaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V4DF")])
@ -2532,7 +2570,8 @@
(match_dup 3))
(const_int 5))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsubaddps\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V4SF")])
@ -2553,7 +2592,8 @@
(match_dup 3))
(const_int 1))]
UNSPEC_FMA4_INTRINSIC))]
"TARGET_FMA4 && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"TARGET_FMA4 && TARGET_FUSED_MADD
&& !(MEM_P (operands[2]) && MEM_P (operands[3]))"
"vfmsubaddpd\t{%3, %2, %1, %0|%0, %1, %2, %3}"
[(set_attr "type" "ssemuladd")
(set_attr "mode" "V2DF")])

11
gcc/doc/invoke.texi
View file

@ -593,7 +593,7 @@ Objective-C and Objective-C++ Dialects}.
-mincoming-stack-boundary=@var{num}
-mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip @gol
-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
-maes -mpclmul @gol
-maes -mpclmul -mfused-madd @gol
-msse4a -m3dnow -mpopcnt -mabm -mfma4 -mxop -mlwp @gol
-mthreads -mno-align-stringops -minline-all-stringops @gol
-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
@ -12062,6 +12062,13 @@ supported architecture, using the appropriate flags. In particular,
the file containing the CPU detection code should be compiled without
these options.
@item -mfused-madd
@itemx -mno-fused-madd
@opindex mfused-madd
@opindex mno-fused-madd
Do (don't) generate code that uses the fused multiply/add or multiply/subtract
instructions. The default is to use these instructions.
@item -mcld
@opindex mcld
This option instructs GCC to emit a @code{cld} instruction in the prologue
@ -12397,7 +12404,7 @@ Do not generate inline code for sqrt.
@opindex mfused-madd
@opindex mno-fused-madd
Do (don't) generate code that uses the fused multiply/add or multiply/subtract
instructions. The default is to use these instructions.
instructions. The default is to use these instructions.
@item -mno-dwarf2-asm
@itemx -mdwarf2-asm