re PR target/52607 (v4df __builtin_shuffle with {0,2,1,3} or {1,3,0,2})
PR target/52607
* config/i386/i386.md ("isa" attribute): Add avx2 and noavx2.
("enabled" attribute): Handle avx2 and noavx2 isas.
* config/i386/sse.md (avx2_vec_dupv8sf_1, avx2_pbroadcast<mode>_1):
New insns.
(vec_dup<mode>): Add avx2 =x,x alternative.
(vec_dup<mode> splitter): Don't split if TARGET_AVX2.
(*avx_vperm_broadcast_<mode>): Don't split V4DFmode if TARGET_AVX2.
For TARGET_AVX2, V8SFmode and elt == 0 split into vbroadcastss.
* config/i386/i386.c (expand_vec_perm_pshufb): Emit also vpermps
for V8SFmode.
(expand_vec_perm_1): For broadcasts, use avx2_pbroadcast<mode>_1
if possible, handle also V8SFmode.
From-SVN: r185577
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
681676df51
commit
6945a32ec3
4 changed files with 78 additions and 15 deletions
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@ -1,3 +1,19 @@
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2012-03-20 Jakub Jelinek <jakub@redhat.com>
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PR target/52607
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* config/i386/i386.md ("isa" attribute): Add avx2 and noavx2.
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("enabled" attribute): Handle avx2 and noavx2 isas.
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* config/i386/sse.md (avx2_vec_dupv8sf_1, avx2_pbroadcast<mode>_1):
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New insns.
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(vec_dup<mode>): Add avx2 =x,x alternative.
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(vec_dup<mode> splitter): Don't split if TARGET_AVX2.
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(*avx_vperm_broadcast_<mode>): Don't split V4DFmode if TARGET_AVX2.
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For TARGET_AVX2, V8SFmode and elt == 0 split into vbroadcastss.
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* config/i386/i386.c (expand_vec_perm_pshufb): Emit also vpermps
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for V8SFmode.
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(expand_vec_perm_1): For broadcasts, use avx2_pbroadcast<mode>_1
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if possible, handle also V8SFmode.
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2012-03-20 Richard Earnshaw <rearnsha@arm.com>
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* arm/predicates.md (zero_operand, reg_or_zero_operand): New predicates.
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@ -35836,7 +35836,7 @@ valid_perm_using_mode_p (enum machine_mode vmode, struct expand_vec_perm_d *d)
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}
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/* A subroutine of ix86_expand_vec_perm_builtin_1. Try to implement D
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in terms of pshufb, vpperm, vpermq, vpermd or vperm2i128. */
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in terms of pshufb, vpperm, vpermq, vpermd, vpermps or vperm2i128. */
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static bool
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expand_vec_perm_pshufb (struct expand_vec_perm_d *d)
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@ -35910,6 +35910,9 @@ expand_vec_perm_pshufb (struct expand_vec_perm_d *d)
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if (valid_perm_using_mode_p (V8SImode, d))
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vmode = V8SImode;
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}
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/* Or if vpermps can be used. */
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else if (d->vmode == V8SFmode)
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vmode = V8SImode;
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if (vmode == V32QImode)
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{
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@ -35952,6 +35955,12 @@ expand_vec_perm_pshufb (struct expand_vec_perm_d *d)
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gen_rtvec_v (GET_MODE_NUNITS (vmode), rperm));
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vperm = force_reg (vmode, vperm);
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if (vmode == V8SImode && d->vmode == V8SFmode)
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{
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vmode = V8SFmode;
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vperm = gen_lowpart (vmode, vperm);
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}
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target = gen_lowpart (vmode, d->target);
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op0 = gen_lowpart (vmode, d->op0);
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if (d->op0 == d->op1)
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@ -35960,6 +35969,8 @@ expand_vec_perm_pshufb (struct expand_vec_perm_d *d)
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emit_insn (gen_ssse3_pshufbv16qi3 (target, op0, vperm));
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else if (vmode == V32QImode)
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emit_insn (gen_avx2_pshufbv32qi3 (target, op0, vperm));
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else if (vmode == V8SFmode)
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emit_insn (gen_avx2_permvarv8sf (target, vperm, op0));
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else
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emit_insn (gen_avx2_permvarv8si (target, vperm, op0));
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}
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@ -36008,20 +36019,17 @@ expand_vec_perm_1 (struct expand_vec_perm_d *d)
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else if (broadcast_perm && TARGET_AVX2)
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{
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/* Use vpbroadcast{b,w,d}. */
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rtx op = d->op0, (*gen) (rtx, rtx) = NULL;
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rtx (*gen) (rtx, rtx) = NULL;
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switch (d->vmode)
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{
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case V32QImode:
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op = gen_lowpart (V16QImode, op);
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gen = gen_avx2_pbroadcastv32qi;
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gen = gen_avx2_pbroadcastv32qi_1;
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break;
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case V16HImode:
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op = gen_lowpart (V8HImode, op);
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gen = gen_avx2_pbroadcastv16hi;
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gen = gen_avx2_pbroadcastv16hi_1;
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break;
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case V8SImode:
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op = gen_lowpart (V4SImode, op);
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gen = gen_avx2_pbroadcastv8si;
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gen = gen_avx2_pbroadcastv8si_1;
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break;
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case V16QImode:
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gen = gen_avx2_pbroadcastv16qi;
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@ -36029,13 +36037,16 @@ expand_vec_perm_1 (struct expand_vec_perm_d *d)
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case V8HImode:
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gen = gen_avx2_pbroadcastv8hi;
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break;
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case V8SFmode:
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gen = gen_avx2_vec_dupv8sf_1;
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break;
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/* For other modes prefer other shuffles this function creates. */
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default: break;
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}
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if (gen != NULL)
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{
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if (!d->testing_p)
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emit_insn (gen (d->target, op));
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emit_insn (gen (d->target, d->op0));
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return true;
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}
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}
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@ -36103,7 +36114,7 @@ expand_vec_perm_1 (struct expand_vec_perm_d *d)
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return true;
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/* Try the SSSE3 pshufb or XOP vpperm or AVX2 vperm2i128,
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vpshufb, vpermd or vpermq variable permutation. */
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vpshufb, vpermd, vpermps or vpermq variable permutation. */
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if (expand_vec_perm_pshufb (d))
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return true;
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@ -639,7 +639,7 @@
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(define_attr "movu" "0,1" (const_string "0"))
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;; Used to control the "enabled" attribute on a per-instruction basis.
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(define_attr "isa" "base,sse2,sse2_noavx,sse3,sse4,sse4_noavx,noavx,avx,bmi2"
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(define_attr "isa" "base,sse2,sse2_noavx,sse3,sse4,sse4_noavx,noavx,avx,avx2,noavx2,bmi2"
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(const_string "base"))
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(define_attr "enabled" ""
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@ -652,6 +652,8 @@
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(symbol_ref "TARGET_SSE4_1 && !TARGET_AVX")
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(eq_attr "isa" "avx") (symbol_ref "TARGET_AVX")
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(eq_attr "isa" "noavx") (symbol_ref "!TARGET_AVX")
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(eq_attr "isa" "avx2") (symbol_ref "TARGET_AVX2")
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(eq_attr "isa" "noavx2") (symbol_ref "!TARGET_AVX2")
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(eq_attr "isa" "bmi2") (symbol_ref "TARGET_BMI2")
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]
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(const_int 1)))
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@ -3808,6 +3808,18 @@
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(set_attr "prefix" "vex")
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(set_attr "mode" "<MODE>")])
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(define_insn "avx2_vec_dupv8sf_1"
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[(set (match_operand:V8SF 0 "register_operand" "=x")
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(vec_duplicate:V8SF
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(vec_select:SF
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(match_operand:V8SF 1 "register_operand" "x")
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(parallel [(const_int 0)]))))]
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"TARGET_AVX2"
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"vbroadcastss\t{%x1, %0|%0, %x1}"
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[(set_attr "type" "sselog1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(define_insn "vec_dupv4sf"
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[(set (match_operand:V4SF 0 "register_operand" "=x,x,x")
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(vec_duplicate:V4SF
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@ -11876,6 +11888,19 @@
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(set_attr "prefix" "vex")
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "avx2_pbroadcast<mode>_1"
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[(set (match_operand:VI_256 0 "register_operand" "=x")
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(vec_duplicate:VI_256
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(vec_select:<ssescalarmode>
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(match_operand:VI_256 1 "nonimmediate_operand" "xm")
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(parallel [(const_int 0)]))))]
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"TARGET_AVX2"
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"vpbroadcast<ssemodesuffix>\t{%x1, %0|%0, %x1}"
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[(set_attr "type" "ssemov")
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(set_attr "prefix_extra" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "avx2_permvarv8si"
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[(set (match_operand:V8SI 0 "register_operand" "=x")
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(unspec:V8SI
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@ -11967,16 +11992,18 @@
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[V8SI V8SF V4DI V4DF])
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(define_insn "vec_dup<mode>"
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[(set (match_operand:AVX_VEC_DUP_MODE 0 "register_operand" "=x,x")
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[(set (match_operand:AVX_VEC_DUP_MODE 0 "register_operand" "=x,x,x")
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(vec_duplicate:AVX_VEC_DUP_MODE
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(match_operand:<ssescalarmode> 1 "nonimmediate_operand" "m,?x")))]
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(match_operand:<ssescalarmode> 1 "nonimmediate_operand" "m,x,?x")))]
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"TARGET_AVX"
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"@
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vbroadcast<ssescalarmodesuffix>\t{%1, %0|%0, %1}
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vbroadcast<ssescalarmodesuffix>\t{%x1, %0|%0, %x1}
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#"
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[(set_attr "type" "ssemov")
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(set_attr "prefix_extra" "1")
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(set_attr "prefix" "vex")
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(set_attr "isa" "*,avx2,noavx2")
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(set_attr "mode" "V8SF")])
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(define_insn "avx2_vbroadcasti128_<mode>"
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@ -11995,7 +12022,7 @@
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[(set (match_operand:AVX_VEC_DUP_MODE 0 "register_operand")
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(vec_duplicate:AVX_VEC_DUP_MODE
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(match_operand:<ssescalarmode> 1 "register_operand")))]
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"TARGET_AVX && reload_completed"
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"TARGET_AVX && !TARGET_AVX2 && reload_completed"
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[(set (match_dup 2)
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(vec_duplicate:<ssehalfvecmode> (match_dup 1)))
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(set (match_dup 0)
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@ -12057,7 +12084,7 @@
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[(match_operand 3 "const_int_operand" "C,n,n")])))]
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"TARGET_AVX"
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"#"
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"&& reload_completed"
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"&& reload_completed && (<MODE>mode != V4DFmode || !TARGET_AVX2)"
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[(set (match_dup 0) (vec_duplicate:VF_256 (match_dup 1)))]
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{
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rtx op0 = operands[0], op1 = operands[1];
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@ -12067,6 +12094,13 @@
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{
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int mask;
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if (TARGET_AVX2 && elt == 0)
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{
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emit_insn (gen_vec_dup<mode> (op0, gen_lowpart (<ssescalarmode>mode,
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op1)));
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DONE;
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}
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/* Shuffle element we care about into all elements of the 128-bit lane.
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The other lane gets shuffled too, but we don't care. */
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if (<MODE>mode == V4DFmode)
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