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re PR target/29756 (SSE intrinsics hard to use without redundant temporaries appearing)

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PR tree-optimization/29756
	gcc.dg/tree-ssa/vector-6.c: Add -Wno-psabi -w to dg-options.
	Add -msse2 for x86 and -maltivec for powerpc.  Use scan-tree-dump-times
	only on selected targets where V4SImode vectors are known to be
	supported.

From-SVN: r236505
This commit is contained in:
Jakub Jelinek 2016-05-20 13:55:58 +02:00 • committed by Jakub Jelinek
parent d78789f516
commit 6804797178
2 changed files with 12 additions and 2 deletions
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8
gcc/testsuite/ChangeLog
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@ -1,3 +1,11 @@
2016-05-20 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/29756
gcc.dg/tree-ssa/vector-6.c: Add -Wno-psabi -w to dg-options.
Add -msse2 for x86 and -maltivec for powerpc. Use scan-tree-dump-times
only on selected targets where V4SImode vectors are known to be
supported.
2016-05-20 Marc Glisse <marc.glisse@inria.fr>
PR tree-optimization/71079

6
gcc/testsuite/gcc.dg/tree-ssa/vector-6.c
View file

@ -1,5 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-O -fdump-tree-ccp1" } */
/* { dg-options "-O -fdump-tree-ccp1 -Wno-psabi -w" } */
/* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-maltivec" { target powerpc_altivec_ok } } */
typedef int v4si __attribute__((vector_size (4 * sizeof (int))));
@ -30,4 +32,4 @@ v4si test4 (v4si v, int i)
return v;
}
/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 4 "ccp1" } } */
/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 4 "ccp1" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */