aarch64: add support for unpacked EOR, ORR and AND
Extended patterns for these instructions to support unpacked vectors. BIC will have to wait, as there is not currently support for unpacked NOT. 2020-05-29 Joe Ramsay <joe.ramsay@arm.com> gcc/ * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support for unpacked EOR, ORR, AND. gcc/testsuite/ * gcc.target/aarch64/sve/load_const_offset_2.c: Force using packed vectors. * gcc.target/aarch64/sve/logical_unpacked_and_1.c: New test. * gcc.target/aarch64/sve/logical_unpacked_and_2.c: New test. * gcc.target/aarch64/sve/logical_unpacked_and_3.c: New test. * gcc.target/aarch64/sve/logical_unpacked_and_4.c: New test. * gcc.target/aarch64/sve/logical_unpacked_and_5.c: New test. * gcc.target/aarch64/sve/logical_unpacked_and_6.c: New test. * gcc.target/aarch64/sve/logical_unpacked_and_7.c: New test. * gcc.target/aarch64/sve/logical_unpacked_eor_1.c: New test. * gcc.target/aarch64/sve/logical_unpacked_eor_2.c: New test. * gcc.target/aarch64/sve/logical_unpacked_eor_3.c: New test. * gcc.target/aarch64/sve/logical_unpacked_eor_4.c: New test. * gcc.target/aarch64/sve/logical_unpacked_eor_5.c: New test. * gcc.target/aarch64/sve/logical_unpacked_eor_6.c: New test. * gcc.target/aarch64/sve/logical_unpacked_eor_7.c: New test. * gcc.target/aarch64/sve/logical_unpacked_orr_1.c: New test. * gcc.target/aarch64/sve/logical_unpacked_orr_2.c: New test. * gcc.target/aarch64/sve/logical_unpacked_orr_3.c: New test. * gcc.target/aarch64/sve/logical_unpacked_orr_4.c: New test. * gcc.target/aarch64/sve/logical_unpacked_orr_5.c: New test. * gcc.target/aarch64/sve/logical_unpacked_orr_6.c: New test. * gcc.target/aarch64/sve/logical_unpacked_orr_7.c: New test. * gcc.target/aarch64/sve/scatter_store_6.c: Force using packed vectors. * gcc.target/aarch64/sve/scatter_store_7.c: Force using packed vectors. * gcc.target/aarch64/sve/strided_load_3.c: Force using packed vectors. * gcc.target/aarch64/sve/strided_store_3.c: Force using packed vectors. * gcc.target/aarch64/sve/unpack_signed_1.c: Force using packed vectors.
This commit is contained in:
parent
697eab1b3e
commit
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28 changed files with 358 additions and 10 deletions
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@ -4211,10 +4211,10 @@
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;; Unpredicated integer binary logical operations.
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(define_insn "<optab><mode>3"
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[(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, ?w, w")
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(LOGICAL:SVE_FULL_I
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(match_operand:SVE_FULL_I 1 "register_operand" "%0, w, w")
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(match_operand:SVE_FULL_I 2 "aarch64_sve_logical_operand" "vsl, vsl, w")))]
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[(set (match_operand:SVE_I 0 "register_operand" "=w, ?w, w")
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(LOGICAL:SVE_I
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(match_operand:SVE_I 1 "register_operand" "%0, w, w")
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(match_operand:SVE_I 2 "aarch64_sve_logical_operand" "vsl, vsl, w")))]
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"TARGET_SVE"
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"@
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<logical>\t%0.<Vetype>, %0.<Vetype>, #%C2
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@ -1,5 +1,5 @@
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/* { dg-do assemble { target aarch64_asm_sve_ok } } */
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/* { dg-options "-O2 -ftree-vectorize -save-temps" } */
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/* { dg-options "-O2 -ftree-vectorize -save-temps --param aarch64-sve-compare-costs=0" } */
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#include <stdint.h>
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint32_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint16_t) (src1[i] & src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tst1w\tz[0-9]+\.s,} 1 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint16_t) (src1[i] & src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */
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/* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint32_t) (src1[i] & src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint32_t *restrict src1, uint16_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint32_t) (src1[i] & src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint32_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint16_t) (src1[i] & src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tst1w\tz[0-9]+\.s,} 1 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint16_t) (src1[i] & src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */
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/* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2){
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint32_t) (src1[i] & src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tand\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint32_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint16_t) (src1[i] ^ src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tst1w\tz[0-9]+\.s,} 1 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint16_t) (src1[i] ^ src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */
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/* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint32_t) (src1[i] ^ src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint32_t *restrict src1, uint16_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint32_t) (src1[i] ^ src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint32_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint16_t) (src1[i] ^ src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\tst1w\tz[0-9]+\.s,} 1 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint16_t) (src1[i] ^ src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */
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/* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2){
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint32_t) (src1[i] ^ src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */
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/* { dg-final { scan-assembler-times {\teor\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
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/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */
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/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
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/* { dg-options "-O3 -msve-vector-bits=256" } */
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#include <stdint.h>
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void
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f (uint32_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
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{
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for (int i = 0; i < 7; ++i)
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dst[i] = (uint16_t) (src1[i] | src2[i]);
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}
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/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.s,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\tst1w\tz[0-9]+\.s,} 1 } } */
|
|
@ -0,0 +1,17 @@
|
|||
/* { dg-options "-O3 -msve-vector-bits=256" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
void
|
||||
f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
|
||||
{
|
||||
for (int i = 0; i < 7; ++i)
|
||||
dst[i] = (uint16_t) (src1[i] | src2[i]);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
|
|
@ -0,0 +1,17 @@
|
|||
/* { dg-options "-O3 -msve-vector-bits=256" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
void
|
||||
f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2)
|
||||
{
|
||||
for (int i = 0; i < 7; ++i)
|
||||
dst[i] = (uint32_t) (src1[i] | src2[i]);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
|
|
@ -0,0 +1,17 @@
|
|||
/* { dg-options "-O3 -msve-vector-bits=256" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
void
|
||||
f (uint64_t *restrict dst, uint32_t *restrict src1, uint16_t *restrict src2)
|
||||
{
|
||||
for (int i = 0; i < 7; ++i)
|
||||
dst[i] = (uint32_t) (src1[i] | src2[i]);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
|
|
@ -0,0 +1,16 @@
|
|||
/* { dg-options "-O3 -msve-vector-bits=256" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
void
|
||||
f (uint32_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
|
||||
{
|
||||
for (int i = 0; i < 7; ++i)
|
||||
dst[i] = (uint16_t) (src1[i] | src2[i]);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.s,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.s,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\tst1w\tz[0-9]+\.s,} 1 } } */
|
|
@ -0,0 +1,17 @@
|
|||
/* { dg-options "-O3 -msve-vector-bits=256" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
void
|
||||
f (uint64_t *restrict dst, uint16_t *restrict src1, uint8_t *restrict src2)
|
||||
{
|
||||
for (int i = 0; i < 7; ++i)
|
||||
dst[i] = (uint16_t) (src1[i] | src2[i]);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.h,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxth\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
|
|
@ -0,0 +1,16 @@
|
|||
/* { dg-options "-O3 -msve-vector-bits=256" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
void
|
||||
f (uint64_t *restrict dst, uint32_t *restrict src1, uint8_t *restrict src2){
|
||||
for (int i = 0; i < 7; ++i)
|
||||
dst[i] = (uint32_t) (src1[i] | src2[i]);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxtb\tz[0-9]+\.s,} 1 } } */
|
||||
/* { dg-final { scan-assembler-times {\torr\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tuxtw\tz[0-9]+\.d,} 2 } } */
|
||||
/* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d,} 2 } } */
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
|
||||
/* { dg-options "-O2 -ftree-vectorize -fwrapv --save-temps" } */
|
||||
/* { dg-options "-O2 -ftree-vectorize -fwrapv --save-temps --param aarch64-sve-compare-costs=0" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
|
||||
/* { dg-options "-O2 -ftree-vectorize --save-temps" } */
|
||||
/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-sve-compare-costs=0" } */
|
||||
|
||||
#define INDEX16 uint16_t
|
||||
#define INDEX32 uint32_t
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
|
||||
/* { dg-options "-O2 -ftree-vectorize --save-temps" } */
|
||||
/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-sve-compare-costs=0" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
|
||||
/* { dg-options "-O2 -ftree-vectorize --save-temps" } */
|
||||
/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-sve-compare-costs=0" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -ftree-vectorize -fno-inline" } */
|
||||
/* { dg-options "-O2 -ftree-vectorize -fno-inline --param aarch64-sve-compare-costs=0" } */
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
|
Loading…
Add table
Reference in a new issue