From 6724292e72a9bdbafb0d95587740378f36036707 Mon Sep 17 00:00:00 2001 From: Andreas Schwab Date: Fri, 15 Jun 2012 08:08:04 +0000 Subject: [PATCH] locks.h (compare_and_swap): Use __sync_bool_compare_and_swap. * sysdep/m68k/locks.h (compare_and_swap): Use __sync_bool_compare_and_swap. (release_set): Use write_barrier instead of inlining it. From-SVN: r188650 --- libjava/ChangeLog | 6 ++++ libjava/sysdep/m68k/locks.h | 56 +++++++++++++++++-------------------- 2 files changed, 32 insertions(+), 30 deletions(-) diff --git a/libjava/ChangeLog b/libjava/ChangeLog index dffa3682726..8a6dd0f1d90 100644 --- a/libjava/ChangeLog +++ b/libjava/ChangeLog @@ -1,3 +1,9 @@ +2012-06-15 Andreas Schwab + + * sysdep/m68k/locks.h (compare_and_swap): Use + __sync_bool_compare_and_swap. + (release_set): Use write_barrier instead of inlining it. + 2012-06-15 Andreas Krebbel * sysdep/s390/locks.h (compare_and_swap, release_set) diff --git a/libjava/sysdep/m68k/locks.h b/libjava/sysdep/m68k/locks.h index d70757a8cd0..b51e314f572 100644 --- a/libjava/sysdep/m68k/locks.h +++ b/libjava/sysdep/m68k/locks.h @@ -1,6 +1,6 @@ // locks.h - Thread synchronization primitives. m68k implementation. -/* Copyright (C) 2006 Free Software Foundation +/* Copyright (C) 2006, 2012 Free Software Foundation This file is part of libgcj. @@ -22,35 +22,7 @@ static inline bool compare_and_swap(volatile obj_addr_t *addr, obj_addr_t old, obj_addr_t new_val) { - char result; - __asm__ __volatile__("cas.l %2,%3,%0; seq %1" - : "+m" (*addr), "=d" (result), "+d" (old) - : "d" (new_val) - : "memory"); - return (bool) result; -} - -// Set *addr to new_val with release semantics, i.e. making sure -// that prior loads and stores complete before this -// assignment. -// On m68k, the hardware shouldn't reorder reads and writes, -// so we just have to convince gcc not to do it either. -static inline void -release_set(volatile obj_addr_t *addr, obj_addr_t new_val) -{ - __asm__ __volatile__(" " : : : "memory"); - *(addr) = new_val; -} - -// Compare_and_swap with release semantics instead of acquire semantics. -// On many architecture, the operation makes both guarantees, so the -// implementation can be the same. -static inline bool -compare_and_swap_release(volatile obj_addr_t *addr, - obj_addr_t old, - obj_addr_t new_val) -{ - return compare_and_swap(addr, old, new_val); + return __sync_bool_compare_and_swap (addr, old, new_val); } // Ensure that subsequent instructions do not execute on stale @@ -69,4 +41,28 @@ write_barrier(void) // m68k does not reorder writes. We just need to ensure that gcc also doesn't. __asm__ __volatile__(" " : : : "memory"); } + +// Set *addr to new_val with release semantics, i.e. making sure +// that prior loads and stores complete before this +// assignment. +// On m68k, the hardware shouldn't reorder reads and writes, +// so we just have to convince gcc not to do it either. +static inline void +release_set(volatile obj_addr_t *addr, obj_addr_t new_val) +{ + write_barrier (); + *addr = new_val; +} + +// Compare_and_swap with release semantics instead of acquire semantics. +// On many architecture, the operation makes both guarantees, so the +// implementation can be the same. +static inline bool +compare_and_swap_release(volatile obj_addr_t *addr, + obj_addr_t old, + obj_addr_t new_val) +{ + return compare_and_swap(addr, old, new_val); +} + #endif