From 64d31343d4676d8ceef9232dcd33824bc2eff330 Mon Sep 17 00:00:00 2001
From: Jeff Law <jlaw@ventanamicro.com>
Date: Mon, 30 Dec 2024 07:40:07 -0700
Subject: [PATCH] [RISC-V][PR target/118122] Fix modes in recently added risc-v
 pattern

The new pattern to optimize certain code sequences on RISC-V played things a
bit fast and loose with modes -- some operands were using the ALLI iterator
while the scratch used X and the split codegen used X.

Naturally under the "right" circumstances this would trigger an ICE due to
mismatched modes.  This patch uses X consistently in that pattern. It also
fixes some formatting nits.

Tested in my tester, but waiting on the pre-commit verdict before moving
forward.

	PR target/118122
gcc/
	* config/riscv/riscv.md (lui_constraint<X:mode>_and_to_or): Use
	X iterator rather than ANYI consistently.  Fix formatting.

gcc/testsuite

	* gcc.target/riscv/pr118122.c: New test.
---
 gcc/config/riscv/riscv.md                 | 24 +++++++++++------------
 gcc/testsuite/gcc.target/riscv/pr118122.c | 12 ++++++++++++
 2 files changed, 24 insertions(+), 12 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/pr118122.c

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 6c6155ceeb8..deb15607549 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -861,19 +861,19 @@
 ;; Transform (X & C1) + C2 into (X | ~C1) - (-C2 | ~C1)
 ;; Where C1 is not a LUI operand, but ~C1 is a LUI operand
 
-(define_insn_and_split "*lui_constraint<ANYI:mode>_and_to_or"
-	[(set (match_operand:ANYI 0 "register_operand" "=r")
-	(plus:ANYI (and:ANYI (match_operand:ANYI 1 "register_operand" "r")
-			 (match_operand 2 "const_int_operand"))
-		 (match_operand 3 "const_int_operand")))
+(define_insn_and_split "*lui_constraint<X:mode>_and_to_or"
+	[(set (match_operand:X 0 "register_operand" "=r")
+	(plus:X (and:X (match_operand:X 1 "register_operand" "r")
+		       (match_operand 2 "const_int_operand"))
+		(match_operand 3 "const_int_operand")))
    (clobber (match_scratch:X 4 "=&r"))]
-  "LUI_OPERAND (~INTVAL (operands[2]))
-   && ((INTVAL (operands[2]) & (-INTVAL (operands[3])))
-   == (-INTVAL (operands[3])))
-   && riscv_const_insns (operands[3], false)
-   && (riscv_const_insns
-   (GEN_INT (~INTVAL (operands[2]) | -INTVAL (operands[3])), false)
-   <= riscv_const_insns (operands[3], false))"
+  "(LUI_OPERAND (~INTVAL (operands[2]))
+    && ((INTVAL (operands[2]) & (-INTVAL (operands[3])))
+	== (-INTVAL (operands[3])))
+    && riscv_const_insns (operands[3], false)
+    && (riscv_const_insns (GEN_INT (~INTVAL (operands[2])
+				    | -INTVAL (operands[3])), false)
+	<= riscv_const_insns (operands[3], false)))"
   "#"
   "&& reload_completed"
   [(set (match_dup 4) (match_dup 5))
diff --git a/gcc/testsuite/gcc.target/riscv/pr118122.c b/gcc/testsuite/gcc.target/riscv/pr118122.c
new file mode 100644
index 00000000000..0cdc3bf83b1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr118122.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fno-tree-ter -fno-forward-propagate" } */
+char c;
+
+void
+foo(short s)
+{
+  s += 34231u;
+  c = s;
+}
+
+