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GCN: Conditionalize 'define_expand "reduc_<fexpander>_scal_<mode>"' on '!TARGET_RDNA2_PLUS' [PR113615]

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On top of commit c7ec7bd1c6
"amdgcn: add -march=gfx1030 EXPERIMENTAL" conditionalizing
'define_expand "reduc_<reduc_op>_scal_<mode>"' on
'!TARGET_RDNA2' (later: '!TARGET_RDNA2_PLUS'), we then did similar in
commit 7cc2262ec9
"gcn/gcn-valu.md: Disable fold_left_plus for TARGET_RDNA2_PLUS [PR113615]"
to conditionalize 'define_expand "fold_left_plus_<mode>"' on
'!TARGET_RDNA2_PLUS', but I found we also need to conditionalize the related
'define_expand "reduc_<fexpander>_scal_<mode>"' on '!TARGET_RDNA2_PLUS', to
avoid ICEs like:

    [...]/gcc.dg/vect/pr108608.c: In function 'foo':
    [...]/gcc.dg/vect/pr108608.c:9:1: error: unrecognizable insn:
    (insn 34 33 35 2 (set (reg:V64DF 723)
            (unspec:V64DF [
                    (reg:V64DF 690 [ vect_m_11.20 ])
                    (const_int 1 [0x1])
                ] UNSPEC_MOV_DPP_SHR)) -1
         (nil))
    during RTL pass: vregs

Similar for 'gcc.dg/vect/vect-fmax-2.c', 'gcc.dg/vect/vect-fmin-2.c', and
'UNSPEC_SMAX_DPP_SHR' for 'gcc.dg/vect/vect-fmax-1.c', and
'UNSPEC_SMIN_DPP_SHR' for 'gcc.dg/vect/vect-fmin-1.c', when running 'vect.exp'
for 'check-gcc-c'.

	PR target/113615
	gcc/
	* config/gcn/gcn-valu.md (define_expand "reduc_<fexpander>_scal_<mode>"):
	Conditionalize on '!TARGET_RDNA2_PLUS'.
	* config/gcn/gcn.cc (gcn_expand_dpp_shr_insn)
	(gcn_expand_reduc_scalar):
	'gcc_checking_assert (!TARGET_RDNA2_PLUS);'.
This commit is contained in:
Thomas Schwinge 2024-02-16 13:04:00 +01:00
parent 159174f257
commit 641b50bffc
2 changed files with 5 additions and 1 deletions
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2
gcc/config/gcn/gcn-valu.md
View file

@ -4261,7 +4261,7 @@
[(match_operand:<SCALAR_MODE> 0 "register_operand")
(fminmaxop:V_FP
(match_operand:V_FP 1 "register_operand"))]
""
"!TARGET_RDNA2_PLUS"
{
/* fmin/fmax are identical to smin/smax. */
emit_insn (gen_reduc_<expander>_scal_<mode> (operands[0], operands[1]));

4
gcc/config/gcn/gcn.cc
View file

@ -5448,6 +5448,8 @@ char *
gcn_expand_dpp_shr_insn (machine_mode mode, const char *insn,
int unspec, int shift)
{
gcc_checking_assert (!TARGET_RDNA2_PLUS);
static char buf[128];
const char *dpp;
const char *vcc_in = "";
@ -5509,6 +5511,8 @@ gcn_expand_dpp_shr_insn (machine_mode mode, const char *insn,
rtx
gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec)
{
gcc_checking_assert (!TARGET_RDNA2_PLUS);
machine_mode orig_mode = mode;
machine_mode scalar_mode = GET_MODE_INNER (mode);
int vf = GET_MODE_NUNITS (mode);