From 6368a493210d49dc5be62ad0da59112d23dfd3ee Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu@cs.umass.edu>
Date: Fri, 15 Nov 2002 22:16:09 +0000
Subject: [PATCH] * config/h8300/h8300.md (4 anonymous patterns): New.

From-SVN: r59144
---
 gcc/ChangeLog             |  4 ++++
 gcc/config/h8300/h8300.md | 42 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 92562b22bcc..91f0afffe59 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2002-11-15  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/h8300/h8300.md (4 anonymous patterns): New.
+
 2002-11-15  Geoffrey Keating  <geoffk@apple.com>
 
 	* params.def (GGC_MIN_HEAPSIZE): Fix GGC_ALWAYS_COLLECT problem.
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index f8a8944b852..d81544521d6 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -2229,6 +2229,48 @@
   [(set_attr "cc" "clobber")
    (set_attr "length" "2")])
 
+;; Storing a part of HImode to QImode.
+
+(define_insn ""
+  [(set (match_operand:QI 0 "general_operand_dst" "=rm<")
+	(subreg:QI (lshiftrt:HI (match_operand:HI 1 "register_operand" "r")
+				(const_int 8)) 1))]
+  ""
+  "mov.b\\t%t1,%R0"
+  [(set_attr "cc" "set_znv")
+   (set_attr "length" "8")])
+
+;; Storing a part of SImode to QImode.
+
+(define_insn ""
+  [(set (match_operand:QI 0 "general_operand_dst" "=rm<")
+	(subreg:QI (lshiftrt:SI (match_operand:SI 1 "register_operand" "r")
+				(const_int 8)) 3))]
+  ""
+  "mov.b\\t%x1,%R0"
+  [(set_attr "cc" "set_znv")
+   (set_attr "length" "8")])
+
+(define_insn ""
+  [(set (match_operand:QI 0 "general_operand_dst" "=rm<")
+	(subreg:QI (lshiftrt:SI (match_operand:SI 1 "register_operand" "r")
+				(const_int 16)) 3))
+   (clobber (match_scratch:SI 2 "=&r"))]
+  "TARGET_H8300H || TARGET_H8300S"
+  "mov.w\\t%e1,%f2\;mov.b\\t%w2,%R0"
+  [(set_attr "cc" "set_znv")
+   (set_attr "length" "8")])
+
+(define_insn ""
+  [(set (match_operand:QI 0 "general_operand_dst" "=rm<")
+	(subreg:QI (lshiftrt:SI (match_operand:SI 1 "register_operand" "r")
+				(const_int 24)) 3))
+   (clobber (match_scratch:SI 2 "=&r"))]
+  "TARGET_H8300H || TARGET_H8300S"
+  "mov.w\\t%e1,%f2\;mov.b\\t%x2,%R0"
+  [(set_attr "cc" "set_znv")
+   (set_attr "length" "8")])
+
 (define_insn_and_split ""
   [(set (pc)
 	(if_then_else (eq (zero_extract:SI (subreg:SI (match_operand:QI 0 "register_operand" "") 0)