CRIS: Add new peephole2 "lra_szext_decomposed_indir_plus"
Exposed when running the test-suite with -flate-combine-instructions. * config/cris/cris.md (lra_szext_decomposed_indir_plus): New peephole2 pattern.
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@ -3024,6 +3024,7 @@
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;; Re-compose a decomposed "indirect offset" address for a szext
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;; operation. The non-clobbering "addi" is generated by LRA.
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;; This and lra_szext_decomposed is covered by cris/rld-legit1.c.
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;; (Unfortunately not true when enabling late-combine.)
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(define_peephole2 ; lra_szext_decomposed_indirect_with_offset
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[(parallel
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[(set (match_operand:SI 0 "register_operand")
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@ -3046,6 +3047,50 @@
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(mem:BW2 (plus:SI (szext:SI (mem:BW (match_dup 1))) (match_dup 2)))))
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(clobber (reg:CC CRIS_CC0_REGNUM))])])
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;; When enabling late-combine, we get a slightly changed register
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;; allocation. The two allocations for the pseudo-registers involved
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;; in the matching pattern get "swapped" and the (plus ...) in the
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;; pattern above is now a load from a stack-slot. If peephole2 is
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;; disabled, we see that the original sequence is actually improved;
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;; one less incoming instruction, a load. We need to "undo" that
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;; improvement a bit and move that load "back" to before the sequence
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;; we combine in lra_szext_decomposed_indirect_with_offset. But that
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;; changed again, so there's no define_peephole2 for that sequence
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;; here, because it'd be hard or impossible to write a matching
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;; test-case. A few commits later, the incoming pattern sequence has
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;; changed again: back to the original but with the (plus...) part of
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;; the address inside the second memory reference.
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;; Coverage: cris/rld-legit1.c@r15-1880-gce34fcc572a0dc or
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;; r15-3386-gaf1500dd8c00 when adding -flate-combine-instructions.
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(define_peephole2 ; lra_szext_decomposed_indir_plus
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[(parallel
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[(set (match_operand:SI 0 "register_operand")
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(sign_extend:SI (mem:BW (match_operand:SI 1 "register_operand"))))
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(clobber (reg:CC CRIS_CC0_REGNUM))])
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(parallel
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[(set (match_operand:SI 3 "register_operand")
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(szext:SI (mem:BW2 (plus:SI
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(match_operand:SI 4 "register_operand")
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(match_operand:SI 2 "register_operand")))))
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(clobber (reg:CC CRIS_CC0_REGNUM))])]
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"(REGNO (operands[0]) == REGNO (operands[3])
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|| peep2_reg_dead_p (3, operands[0]))
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&& (REGNO (operands[0]) == REGNO (operands[1])
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|| peep2_reg_dead_p (3, operands[0]))
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&& (rtx_equal_p (operands[2], operands[0])
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|| rtx_equal_p (operands[4], operands[0]))"
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[(parallel
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[(set
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(match_dup 3)
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(szext:SI
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(mem:BW2 (plus:SI (szext:SI (mem:BW (match_dup 1))) (match_dup 2)))))
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(clobber (reg:CC CRIS_CC0_REGNUM))])]
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{
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if (! rtx_equal_p (operands[4], operands[0]))
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operands[2] = operands[4];
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})
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;; Add operations with similar or same decomposed addresses here, when
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;; encountered - but only when covered by mentioned test-cases for at
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;; least one of the cases generalized in the pattern.
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