i386.c (ix86_avoid_lea_for_addr): Handle zero-extended addresses.
* config/i386/i386.c (ix86_avoid_lea_for_addr): Handle zero-extended addresses. Return false if the address has less than two components. (ix86_split_lea_for_addr): Unconditionally convert target and all address operands to requested mode. * config/i386/i386.md (*lea<mode>): Recover operands from curr_insn. Pass SImode to ix86_split_lea_for_addr when splitting zero-extended address. (zero-extended add splitter): New splitter to conditionally split non-destructive adds. (*zero_extendsidi2_rex64): Conditionally emit leal instead of movl. From-SVN: r189925
This commit is contained in:
Uros Bizjak
Uros Bizjak
parent
c50b82a885
commit
61c7941c24
3 changed files with 82 additions and 21 deletions
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@ -1,3 +1,17 @@
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2012-07-27 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (ix86_avoid_lea_for_addr): Handle
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zero-extended addresses. Return false if the address has less
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than two components.
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(ix86_split_lea_for_addr): Unconditionally convert target and
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all address operands to requested mode.
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* config/i386/i386.md (*lea<mode>): Recover operands from curr_insn.
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Pass SImode to ix86_split_lea_for_addr when splitting zero-extended
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address.
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(zero-extended add splitter): New splitter to conditionally split
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non-destructive adds.
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(*zero_extendsidi2_rex64): Conditionally emit leal instead of movl.
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2012-07-28 Alan Modra <amodra@gmail.com>
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PR target/54093
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@ -17036,11 +17036,6 @@ ix86_avoid_lea_for_addr (rtx insn, rtx operands[])
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struct ix86_address parts;
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int ok;
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/* FIXME: Handle zero-extended addresses. */
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if (GET_CODE (operands[1]) == ZERO_EXTEND
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|| GET_CODE (operands[1]) == AND)
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return false;
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/* Check we need to optimize. */
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if (!TARGET_OPT_AGU || optimize_function_for_size_p (cfun))
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return false;
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@ -17052,6 +17047,11 @@ ix86_avoid_lea_for_addr (rtx insn, rtx operands[])
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ok = ix86_decompose_address (operands[1], &parts);
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gcc_assert (ok);
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/* There should be at least two components in the address. */
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if ((parts.base != NULL_RTX) + (parts.index != NULL_RTX)
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+ (parts.disp != NULL_RTX) + (parts.scale > 1) < 2)
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return false;
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/* We should not split into add if non legitimate pic
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operand is used as displacement. */
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if (parts.disp && flag_pic && !LEGITIMATE_PIC_OPERAND_P (parts.disp))
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@ -17124,7 +17124,7 @@ ix86_emit_binop (enum rtx_code code, enum machine_mode mode,
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It is assumed that it is allowed to clobber flags register
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at lea position. */
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extern void
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void
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ix86_split_lea_for_addr (rtx operands[], enum machine_mode mode)
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{
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unsigned int regno0, regno1, regno2;
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@ -17135,7 +17135,7 @@ ix86_split_lea_for_addr (rtx operands[], enum machine_mode mode)
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ok = ix86_decompose_address (operands[1], &parts);
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gcc_assert (ok);
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target = operands[0];
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target = gen_lowpart (mode, operands[0]);
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regno0 = true_regnum (target);
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regno1 = INVALID_REGNUM;
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@ -17143,18 +17143,19 @@ ix86_split_lea_for_addr (rtx operands[], enum machine_mode mode)
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if (parts.base)
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{
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if (GET_MODE (parts.base) != mode)
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parts.base = gen_lowpart (mode, parts.base);
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parts.base = gen_lowpart (mode, parts.base);
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regno1 = true_regnum (parts.base);
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}
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if (parts.index)
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{
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if (GET_MODE (parts.index) != mode)
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parts.index = gen_lowpart (mode, parts.index);
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parts.index = gen_lowpart (mode, parts.index);
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regno2 = true_regnum (parts.index);
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}
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if (parts.disp)
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parts.disp = gen_lowpart (mode, parts.disp);
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if (parts.scale > 1)
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{
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/* Case r1 = r1 + ... */
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@ -3474,13 +3474,28 @@
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(match_operand:SI 1 "x86_64_zext_general_operand"
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"rmWz,0,r ,m ,r ,m")))]
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"TARGET_64BIT"
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"@
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mov{l}\t{%1, %k0|%k0, %1}
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#
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movd\t{%1, %0|%0, %1}
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movd\t{%1, %0|%0, %1}
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%vmovd\t{%1, %0|%0, %1}
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%vmovd\t{%1, %0|%0, %1}"
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{
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switch (get_attr_type (insn))
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{
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case TYPE_IMOVX:
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if (ix86_use_lea_for_mov (insn, operands))
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return "lea{l}\t{%E1, %k0|%k0, %E1}";
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else
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return "mov{l}\t{%1, %k0|%k0, %1}";
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case TYPE_MULTI:
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return "#";
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case TYPE_MMXMOV:
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return "movd\t{%1, %0|%0, %1}";
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case TYPE_SSEMOV:
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return "%vmovd\t{%1, %0|%0, %1}";
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default:
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gcc_unreachable ();
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}
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}
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[(set_attr "type" "imovx,multi,mmxmov,mmxmov,ssemov,ssemov")
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(set_attr "prefix" "orig,*,orig,orig,maybe_vex,maybe_vex")
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(set_attr "prefix_0f" "0,*,*,*,*,*")
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@ -5479,7 +5494,23 @@
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"reload_completed && ix86_avoid_lea_for_addr (insn, operands)"
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[(const_int 0)]
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{
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ix86_split_lea_for_addr (operands, <MODE>mode);
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enum machine_mode mode = <MODE>mode;
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rtx pat;
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/* ix86_avoid_lea_for_addr re-recognizes insn and may
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change operands[] array behind our back. */
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pat = PATTERN (curr_insn);
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operands[0] = SET_DEST (pat);
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operands[1] = SET_SRC (pat);
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/* Emit all operations in SImode for zero-extended addresses. Recall
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that x86_64 inheretly zero-extends SImode operations to DImode. */
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if (GET_CODE (operands[1]) == ZERO_EXTEND
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|| GET_CODE (operands[1]) == AND)
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mode = SImode;
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ix86_split_lea_for_addr (operands, mode);
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DONE;
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}
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[(set_attr "type" "lea")
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@ -5807,11 +5838,11 @@
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(define_split
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[(set (match_operand:SWI48 0 "register_operand")
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(plus:SWI48 (match_operand:SWI48 1 "register_operand")
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(match_operand:SWI48 2 "nonmemory_operand")))
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(match_operand:SWI48 2 "x86_64_nonmemory_operand")))
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(clobber (reg:CC FLAGS_REG))]
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"reload_completed && ix86_avoid_lea_for_add (insn, operands)"
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[(set (match_dup 0) (match_dup 1))
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(parallel [(set (match_dup 0) (plus:<MODE> (match_dup 0) (match_dup 2)))
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(parallel [(set (match_dup 0) (plus:SWI48 (match_dup 0) (match_dup 2)))
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(clobber (reg:CC FLAGS_REG))])])
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;; Convert add to the lea pattern to avoid flags dependency.
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@ -5840,6 +5871,21 @@
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DONE;
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})
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;; Split non destructive adds if we cannot use lea.
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(define_split
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[(set (match_operand:DI 0 "register_operand")
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(zero_extend:DI
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(plus:SI (match_operand:SI 1 "register_operand")
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(match_operand:SI 2 "x86_64_nonmemory_operand"))))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT
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&& reload_completed && ix86_avoid_lea_for_add (insn, operands)"
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[(set (match_dup 3) (match_dup 1))
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(parallel [(set (match_dup 0)
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(zero_extend:DI (plus:SI (match_dup 3) (match_dup 2))))
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(clobber (reg:CC FLAGS_REG))])]
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"operands[3] = gen_lowpart (SImode, operands[0]);")
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;; Convert add to the lea pattern to avoid flags dependency.
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(define_split
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[(set (match_operand:DI 0 "register_operand")
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