Fix for m68k -O0 libstdc++ compiler abort.
* config/m68k/m68k.h (HARD_REGNO_MODE_OK): For FP regs, add REGNO >= 16 check. Add comment to document problems with TARGET_SUN_FPA version of this macro. * config/m68k/m68k.md (movxf+1): Support 'r'/'r' moves. From-SVN: r23056
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3 changed files with 28 additions and 11 deletions
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@ -1,3 +1,10 @@
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Tue Oct 13 17:51:04 1998 Jim Wilson <wilson@cygnus.com>
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* config/m68k/m68k.h (HARD_REGNO_MODE_OK): For FP regs, add REGNO >= 16
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check. Add comment to document problems with TARGET_SUN_FPA version
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of this macro.
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* config/m68k/m68k.md (movxf+1): Support 'r'/'r' moves.
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Tue Oct 13 17:46:18 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
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* Makefile.in (gencheck.o): Depend on gansidecl.h.
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@ -471,8 +471,8 @@ extern int target_flags;
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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(((REGNO) < 16 \
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&& !((REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8)) \
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|| ((REGNO) < 24 \
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&& !((REGNO) < 8 && (REGNO) + GET_MODE_SIZE (MODE) / 4 > 8)) \
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|| ((REGNO) >= 16 && (REGNO) < 24 \
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&& TARGET_68881 \
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&& (GET_MODE_CLASS (MODE) == MODE_FLOAT \
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|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)))
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@ -486,6 +486,11 @@ extern int target_flags;
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(apparently) hold whatever you feel like putting in them.
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If using the fpa, don't put a double in d7/a0. */
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/* ??? This is confused. The check to prohibit d7/a0 overlaps should always
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be enabled regardless of whether TARGET_FPA is specified. It isn't clear
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what the other d/a register checks are for. Every check using REGNO
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actually needs to use a range, e.g. 24>=X<56 not <56. There is probably
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no one using this code anymore. */
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#define HARD_REGNO_MODE_OK(REGNO, MODE) \
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(((REGNO) < 16 \
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&& !(TARGET_FPA \
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@ -1224,8 +1224,8 @@
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}")
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(define_insn ""
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[(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,f,!r,!f")
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(match_operand:XF 1 "nonimmediate_operand" "m,f,f,f,r"))]
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[(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,f,!r,!f,!r")
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(match_operand:XF 1 "nonimmediate_operand" "m,f,f,f,r,!r"))]
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"TARGET_68881"
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"*
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{
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@ -1247,15 +1247,20 @@
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return \"fmove%.x %1,%0\";
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return \"fmove%.x %f1,%0\";
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}
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if (REG_P (operands[0]))
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if (FP_REG_P (operands[1]))
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{
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output_asm_insn (\"fmove%.x %f1,%-\;move%.l %+,%0\", operands);
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operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
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output_asm_insn (\"move%.l %+,%0\", operands);
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operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
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return \"move%.l %+,%0\";
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if (REG_P (operands[0]))
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{
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output_asm_insn (\"fmove%.x %f1,%-\;move%.l %+,%0\", operands);
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operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
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output_asm_insn (\"move%.l %+,%0\", operands);
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operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
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return \"move%.l %+,%0\";
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}
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/* Must be memory destination. */
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return \"fmove%.x %f1,%0\";
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}
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return \"fmove%.x %f1,%0\";
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return output_move_double (operands);
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}
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")
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