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arm.c (arm_load_pic_register): Pass extra reg to gen_pic_add_dot_plus_four and gen_pic_add_dot_plus_eight.

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gcc/
	* config/arm/arm.c (arm_load_pic_register): Pass extra reg to
	gen_pic_add_dot_plus_four and gen_pic_add_dot_plus_eight.
	(arm_call_tls_get_addr, legitimize_tls_address): Likewise.
	* config/arm/arm.md: Use match_operand in peephole input templates
	and match_dup in peephole output templates.
gcc/testsuite/
	* gcc.dg/tls/opt-10.c: New test.

From-SVN: r106493
This commit is contained in:
Paul Brook 2005-11-04 15:43:51 +00:00 • committed by Daniel Jacobowitz
parent e993ba8f57
commit 6137ba9073
5 changed files with 48 additions and 18 deletions
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8
gcc/ChangeLog
View file

@ -1,3 +1,11 @@
2005-11-04 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_load_pic_register): Pass extra reg to
gen_pic_add_dot_plus_four and gen_pic_add_dot_plus_eight.
(arm_call_tls_get_addr, legitimize_tls_address): Likewise.
* config/arm/arm.md: Use match_operand in peephole input templates
and match_dup in peephole output templates.
2005-11-04 Daniel Jacobowitz <dan@codesourcery.com>
* config/arm/arm.c (arm_init_libfuncs): Use __aeabi_idiv and

12
gcc/config/arm/arm.c
View file

@ -3373,7 +3373,8 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED)
if (TARGET_ARM)
{
emit_insn (gen_pic_load_addr_arm (pic_offset_table_rtx, pic_rtx));
emit_insn (gen_pic_add_dot_plus_eight (pic_offset_table_rtx, l1));
emit_insn (gen_pic_add_dot_plus_eight (pic_offset_table_rtx,
pic_offset_table_rtx, l1));
}
else
{
@ -3388,7 +3389,8 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED)
}
else
emit_insn (gen_pic_load_addr_thumb (pic_offset_table_rtx, pic_rtx));
emit_insn (gen_pic_add_dot_plus_four (pic_offset_table_rtx, l1));
emit_insn (gen_pic_add_dot_plus_four (pic_offset_table_rtx,
pic_offset_table_rtx, l1));
}
/* Need to emit this whether or not we obey regdecls,
@ -3833,9 +3835,9 @@ arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
reg = load_tls_operand (sum, reg);
if (TARGET_ARM)
emit_insn (gen_pic_add_dot_plus_eight (reg, label));
emit_insn (gen_pic_add_dot_plus_eight (reg, reg, label));
else
emit_insn (gen_pic_add_dot_plus_four (reg, label));
emit_insn (gen_pic_add_dot_plus_four (reg, reg, label));
*valuep = emit_library_call_value (get_tls_get_addr (), NULL_RTX, LCT_PURE, /* LCT_CONST? */
Pmode, 1, reg, Pmode);
@ -3889,7 +3891,7 @@ legitimize_tls_address (rtx x, rtx reg)
emit_insn (gen_tls_load_dot_plus_eight (reg, reg, label));
else
{
emit_insn (gen_pic_add_dot_plus_four (reg, label));
emit_insn (gen_pic_add_dot_plus_four (reg, reg, label));
emit_move_insn (reg, gen_const_mem (SImode, reg));
}

26
gcc/config/arm/arm.md
View file

@ -4464,31 +4464,31 @@
)
(define_insn "pic_add_dot_plus_four"
[(set (match_operand:SI 0 "register_operand" "+r")
(unspec:SI [(plus:SI (match_dup 0)
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "0")
(const (plus:SI (pc) (const_int 4))))]
UNSPEC_PIC_BASE))
(use (label_ref (match_operand 1 "" "")))]
(use (label_ref (match_operand 2 "" "")))]
"TARGET_THUMB"
"*
(*targetm.asm_out.internal_label) (asm_out_file, \"L\",
CODE_LABEL_NUMBER (operands[1]));
CODE_LABEL_NUMBER (operands[2]));
return \"add\\t%0, %|pc\";
"
[(set_attr "length" "2")]
)
(define_insn "pic_add_dot_plus_eight"
[(set (match_operand:SI 0 "register_operand" "+r")
(unspec:SI [(plus:SI (match_dup 0)
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "r")
(const (plus:SI (pc) (const_int 8))))]
UNSPEC_PIC_BASE))
(use (label_ref (match_operand 1 "" "")))]
(use (label_ref (match_operand 2 "" "")))]
"TARGET_ARM"
"*
(*targetm.asm_out.internal_label) (asm_out_file, \"L\",
CODE_LABEL_NUMBER (operands[1]));
return \"add%?\\t%0, %|pc, %0\";
CODE_LABEL_NUMBER (operands[2]));
return \"add%?\\t%0, %|pc, %1\";
"
[(set_attr "predicable" "yes")]
)
@ -4514,17 +4514,17 @@
(define_peephole2
[(parallel [(set (match_operand:SI 0 "register_operand" "")
(unspec:SI [(plus:SI (match_dup 0)
(unspec:SI [(plus:SI (match_operand:SI 3 "register_operand" "")
(const (plus:SI (pc) (const_int 8))))]
UNSPEC_PIC_BASE))
(use (label_ref (match_operand 1 "" "")))])
(set (match_operand:SI 2 "register_operand" "") (mem:SI (match_dup 0)))]
"TARGET_ARM && peep2_reg_dead_p (2, operands[0])"
[(parallel [(set (match_operand:SI 2 "register_operand" "+r")
(mem:SI (unspec:SI [(plus:SI (match_dup 0)
[(parallel [(set (match_dup 2)
(mem:SI (unspec:SI [(plus:SI (match_dup 3)
(const (plus:SI (pc) (const_int 8))))]
UNSPEC_PIC_BASE)))
(use (label_ref (match_operand 1 "" "")))])]
(use (label_ref (match_dup 1)))])]
""
)

4
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,7 @@
2005-11-04 Paul Brook <paul@codesourcery.com>
* gcc.dg/tls/opt-10.c: New test.
2005-11-04 Andreas Jaeger <aj@suse.de>
* gcc.dg/format/unnamed-1.c: Add -msse for x86 compilation to

16
gcc/testsuite/gcc.dg/tls/opt-10.c Normal file
View file

@ -0,0 +1,16 @@
/* { dg-do compile */
/* { dg-options "-O3 -fpic" } */
/* The web pass was creating unrecognisable pic_load_dot_plus_four insns
on ARM. */
__thread int a_thread_local;
void *
spin (int n)
{
int i;
for (i = 0; i <= n; i++)
{
a_thread_local += i;
}
}