mips.h (TARGET_CPU_CPP_BUILTINS): Check mips_base_mips16 instead of TARGET_MIPS16.
gcc/ * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Check mips_base_mips16 instead of TARGET_MIPS16. (mips_base_mips16): Declare. * config/mips/mips.c (mips_base_mips16): Make global. (was_mips16_p): Remove GTY marker. (was_mips16_pch_p): New variable. (mips_set_mips16_mode): Check both was_mips16_p and was_mips16_pch_p. (mips_override_options): Force to non-MIPS16 mode initially. Do not complain about MIPS16 PIC incompatibilities here. Only allow -mgpopt if -mexplicit-relocs is in force for non-MIPS16 code. gcc/testsuite/ * gcc.target/mips/gcc-have-sync-compare-and-swap-1.c: Expect the macros to be defined for MIPS16 too. * gcc.target/mips/gcc-have-sync-compare-and-swap-2.c: Likewise. * gcc.target/mips/gcc-have-sync-compare-and-swap-3.c: New test. * gcc.target/mips/gcc-have-sync-compare-and-swap-4.c: Likewise. From-SVN: r137539
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
bba09b5aac
commit
60730adec0
8 changed files with 100 additions and 25 deletions
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@ -1,3 +1,17 @@
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2008-07-06 Richard Sandiford <rdsandiford@googlemail.com>
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* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Check
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mips_base_mips16 instead of TARGET_MIPS16.
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(mips_base_mips16): Declare.
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* config/mips/mips.c (mips_base_mips16): Make global.
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(was_mips16_p): Remove GTY marker.
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(was_mips16_pch_p): New variable.
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(mips_set_mips16_mode): Check both was_mips16_p and was_mips16_pch_p.
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(mips_override_options): Force to non-MIPS16 mode initially.
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Do not complain about MIPS16 PIC incompatibilities here.
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Only allow -mgpopt if -mexplicit-relocs is in force for
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non-MIPS16 code.
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2008-07-06 Andreas Tobler <a.tobler@schweiz.org>
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* configure.ac: Check for caddr_t, define to char * if not defined.
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@ -442,7 +442,7 @@ const struct mips_rtx_cost_data *mips_cost;
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static int mips_base_target_flags;
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/* True if MIPS16 is the default mode. */
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static bool mips_base_mips16;
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bool mips_base_mips16;
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/* The ambient values of other global variables. */
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static int mips_base_delayed_branch; /* flag_delayed_branch */
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@ -12333,8 +12333,14 @@ mips_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
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}
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/* The last argument passed to mips_set_mips16_mode, or negative if the
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function hasn't been called yet. */
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static GTY(()) int was_mips16_p = -1;
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function hasn't been called yet.
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There are two copies of this information. One is saved and restored
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by the PCH process while the other is specific to this compiler
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invocation. The information calculated by mips_set_mips16_mode
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is invalid unless the two variables are the same. */
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static int was_mips16_p = -1;
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static GTY(()) int was_mips16_pch_p = -1;
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/* Set up the target-dependent global state so that it matches the
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current function's ISA mode. */
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@ -12342,7 +12348,8 @@ static GTY(()) int was_mips16_p = -1;
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static void
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mips_set_mips16_mode (int mips16_p)
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{
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if (mips16_p == was_mips16_p)
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if (mips16_p == was_mips16_p
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&& mips16_p == was_mips16_pch_p)
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return;
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/* Restore base settings of various flags. */
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@ -12417,11 +12424,12 @@ mips_set_mips16_mode (int mips16_p)
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/* (Re)initialize MIPS target internals for new ISA. */
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mips_init_relocs ();
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if (was_mips16_p >= 0)
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if (was_mips16_p >= 0 || was_mips16_pch_p >= 0)
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/* Reinitialize target-dependent state. */
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target_reinit ();
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was_mips16_p = mips16_p;
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was_mips16_pch_p = mips16_p;
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}
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/* Implement TARGET_SET_CURRENT_FUNCTION. Decide whether the current
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@ -12627,6 +12635,10 @@ mips_override_options (void)
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{
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int i, start, regno, mode;
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/* Process flags as though we were generating non-MIPS16 code. */
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mips_base_mips16 = TARGET_MIPS16;
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target_flags &= ~MASK_MIPS16;
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#ifdef SUBTARGET_OVERRIDE_OPTIONS
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SUBTARGET_OVERRIDE_OPTIONS;
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#endif
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@ -12772,14 +12784,6 @@ mips_override_options (void)
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target_flags &= ~MASK_ABICALLS;
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}
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/* MIPS16 cannot generate PIC yet. */
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if (TARGET_MIPS16 && (flag_pic || TARGET_ABICALLS))
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{
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sorry ("MIPS16 PIC");
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target_flags &= ~MASK_ABICALLS;
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flag_pic = flag_pie = flag_shlib = 0;
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}
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if (TARGET_ABICALLS)
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/* We need to set flag_pic for executables as well as DSOs
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because we may reference symbols that are not defined in
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@ -12807,7 +12811,7 @@ mips_override_options (void)
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{
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if (!TARGET_GPOPT)
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{
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if (!TARGET_MIPS16 && !TARGET_EXPLICIT_RELOCS)
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if (!TARGET_EXPLICIT_RELOCS)
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error ("%<-mno-gpopt%> needs %<-mexplicit-relocs%>");
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TARGET_LOCAL_SDATA = false;
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@ -12911,7 +12915,6 @@ mips_override_options (void)
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target_flags |= MASK_FIX_R4400;
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/* Save base state of options. */
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mips_base_mips16 = TARGET_MIPS16;
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mips_base_target_flags = target_flags;
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mips_base_delayed_branch = flag_delayed_branch;
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mips_base_schedule_insns = flag_schedule_insns;
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@ -12921,8 +12924,11 @@ mips_override_options (void)
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mips_base_align_jumps = align_jumps;
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mips_base_align_functions = align_functions;
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/* Now select the ISA mode. */
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mips_set_mips16_mode (mips_base_mips16);
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/* Now select the ISA mode.
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Do all CPP-sensitive stuff in non-MIPS16 mode; we'll switch to
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MIPS16 mode afterwards if need be. */
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mips_set_mips16_mode (false);
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/* We call dbr_schedule from within mips_reorg. */
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flag_delayed_branch = 0;
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@ -390,7 +390,7 @@ enum mips_code_readable_setting {
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else \
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builtin_define ("__mips_fpr=32"); \
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\
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if (TARGET_MIPS16) \
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if (mips_base_mips16) \
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builtin_define ("__mips16"); \
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\
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if (TARGET_MIPS3D) \
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@ -3232,6 +3232,7 @@ extern int mips_abi; /* which ABI to use */
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extern const struct mips_cpu_info *mips_arch_info;
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extern const struct mips_cpu_info *mips_tune_info;
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extern const struct mips_rtx_cost_data *mips_cost;
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extern bool mips_base_mips16;
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extern enum mips_code_readable_setting mips_code_readable;
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#endif
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@ -1,3 +1,11 @@
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2008-07-06 Richard Sandiford <rdsandiford@googlemail.com>
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* gcc.target/mips/gcc-have-sync-compare-and-swap-1.c: Expect the
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macros to be defined for MIPS16 too.
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* gcc.target/mips/gcc-have-sync-compare-and-swap-2.c: Likewise.
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* gcc.target/mips/gcc-have-sync-compare-and-swap-3.c: New test.
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* gcc.target/mips/gcc-have-sync-compare-and-swap-4.c: Likewise.
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2008-07-06 Richard Guenther <rguenther@suse.de>
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* gcc.dg/tree-ssa/pta-callused.c: Adjust testcase.
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@ -1,15 +1,15 @@
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/* { dg-do preprocess } */
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/* { dg-mips-options "-mips2" } */
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#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1) == defined (__mips16)
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
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#error nonono
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#endif
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#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2) == defined (__mips16)
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
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#error nonono
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#endif
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#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) == defined (__mips16)
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#error nonono
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#endif
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@ -1,19 +1,19 @@
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/* { dg-do preprocess } */
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/* { dg-mips-options "-mgp64" } */
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#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1) == defined (__mips16)
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
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#error nonono
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#endif
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#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2) == defined (__mips16)
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
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#error nonono
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#endif
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#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) == defined (__mips16)
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#error nonono
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#endif
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#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) == defined (__mips16)
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
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#error nonono
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#endif
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@ -0,0 +1,23 @@
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/* { dg-do preprocess { target mips16_attribute } } */
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/* { dg-mips-options "-mips2 -mips16" } */
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/* { dg-add-options mips16_attribute } */
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
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#error nonono
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#endif
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
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#error nonono
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#endif
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#error nonono
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#endif
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
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#error nonono
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#endif
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
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#error nonono
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#endif
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@ -0,0 +1,23 @@
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/* { dg-do preprocess { target mips16_attribute } } */
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/* { dg-mips-options "-mgp64 -mips16" } */
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/* { dg-add-options mips16_attribute } */
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
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#error nonono
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#endif
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
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#error nonono
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#endif
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#error nonono
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#endif
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
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#error nonono
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#endif
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
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#error nonono
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#endif
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