mode-switching.c (optimize_mode_switching): Set correct RTL profile.
* mode-switching.c (optimize_mode_switching): Set correct RTL profile. * config/i386/i386.c (ix86_compute_frame_layout, ix86_expand_epilogue, emit_i387_cw_initialization, ix86_expand_vector_move_misalign, ix86_fp_comparison_strategy, ix86_local_alignment): Fix use of size/speed predicates. From-SVN: r198825
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a164a17b5e
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3 changed files with 23 additions and 9 deletions
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@ -1,3 +1,10 @@
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2013-05-13 Jan Hubicka <jh@suse.cz>
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* mode-switching.c (optimize_mode_switching): Set correct RTL profile.
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* config/i386/i386.c (ix86_compute_frame_layout,
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ix86_expand_epilogue, emit_i387_cw_initialization, ix86_expand_vector_move_misalign,
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ix86_fp_comparison_strategy, ix86_local_alignment): Fix use of size/speed predicates.
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2013-05-13 Jakub Jelinek <jakub@redhat.com>
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2013-05-13 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/45216
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PR tree-optimization/45216
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@ -9003,7 +9003,7 @@ ix86_compute_frame_layout (struct ix86_frame *frame)
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Recompute the value as needed. Do not recompute when amount of registers
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Recompute the value as needed. Do not recompute when amount of registers
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didn't change as reload does multiple calls to the function and does not
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didn't change as reload does multiple calls to the function and does not
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expect the decision to change within single iteration. */
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expect the decision to change within single iteration. */
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else if (!optimize_function_for_size_p (cfun)
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else if (!optimize_bb_for_size_p (ENTRY_BLOCK_PTR)
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&& cfun->machine->use_fast_prologue_epilogue_nregs != frame->nregs)
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&& cfun->machine->use_fast_prologue_epilogue_nregs != frame->nregs)
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{
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{
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int count = frame->nregs;
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int count = frame->nregs;
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@ -11071,7 +11071,7 @@ ix86_expand_epilogue (int style)
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/* Leave results in shorter dependency chains on CPUs that are
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/* Leave results in shorter dependency chains on CPUs that are
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able to grok it fast. */
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able to grok it fast. */
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else if (TARGET_USE_LEAVE
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else if (TARGET_USE_LEAVE
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|| optimize_function_for_size_p (cfun)
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|| optimize_bb_for_size_p (EXIT_BLOCK_PTR)
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|| !cfun->machine->use_fast_prologue_epilogue)
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|| !cfun->machine->use_fast_prologue_epilogue)
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ix86_emit_leave ();
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ix86_emit_leave ();
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else
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else
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@ -15668,7 +15668,7 @@ emit_i387_cw_initialization (int mode)
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emit_move_insn (reg, copy_rtx (stored_mode));
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emit_move_insn (reg, copy_rtx (stored_mode));
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if (TARGET_64BIT || TARGET_PARTIAL_REG_STALL
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if (TARGET_64BIT || TARGET_PARTIAL_REG_STALL
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|| optimize_function_for_size_p (cfun))
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|| optimize_insn_for_size_p ())
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{
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{
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switch (mode)
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switch (mode)
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{
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{
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@ -16426,7 +16426,7 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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if (TARGET_AVX
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if (TARGET_AVX
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|| TARGET_SSE_UNALIGNED_LOAD_OPTIMAL
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|| TARGET_SSE_UNALIGNED_LOAD_OPTIMAL
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|| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
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|| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
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|| optimize_function_for_size_p (cfun))
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|| optimize_insn_for_size_p ())
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{
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{
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/* We will eventually emit movups based on insn attributes. */
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/* We will eventually emit movups based on insn attributes. */
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emit_insn (gen_sse2_loadupd (op0, op1));
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emit_insn (gen_sse2_loadupd (op0, op1));
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@ -16463,7 +16463,7 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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if (TARGET_AVX
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if (TARGET_AVX
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|| TARGET_SSE_UNALIGNED_LOAD_OPTIMAL
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|| TARGET_SSE_UNALIGNED_LOAD_OPTIMAL
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|| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
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|| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
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|| optimize_function_for_size_p (cfun))
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|| optimize_insn_for_size_p ())
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{
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{
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op0 = gen_lowpart (V4SFmode, op0);
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op0 = gen_lowpart (V4SFmode, op0);
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op1 = gen_lowpart (V4SFmode, op1);
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op1 = gen_lowpart (V4SFmode, op1);
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@ -16499,7 +16499,7 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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if (TARGET_AVX
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if (TARGET_AVX
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|| TARGET_SSE_UNALIGNED_STORE_OPTIMAL
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|| TARGET_SSE_UNALIGNED_STORE_OPTIMAL
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|| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
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|| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
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|| optimize_function_for_size_p (cfun))
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|| optimize_insn_for_size_p ())
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/* We will eventually emit movups based on insn attributes. */
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/* We will eventually emit movups based on insn attributes. */
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emit_insn (gen_sse2_storeupd (op0, op1));
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emit_insn (gen_sse2_storeupd (op0, op1));
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else
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else
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@ -16518,7 +16518,7 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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if (TARGET_AVX
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if (TARGET_AVX
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|| TARGET_SSE_UNALIGNED_STORE_OPTIMAL
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|| TARGET_SSE_UNALIGNED_STORE_OPTIMAL
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|| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
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|| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
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|| optimize_function_for_size_p (cfun))
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|| optimize_insn_for_size_p ())
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{
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{
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op0 = gen_lowpart (V4SFmode, op0);
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op0 = gen_lowpart (V4SFmode, op0);
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emit_insn (gen_sse_storeups (op0, op1));
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emit_insn (gen_sse_storeups (op0, op1));
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@ -18764,7 +18764,7 @@ ix86_fp_comparison_strategy (enum rtx_code code ATTRIBUTE_UNUSED)
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if (TARGET_CMOVE)
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if (TARGET_CMOVE)
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return IX86_FPCMP_COMI;
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return IX86_FPCMP_COMI;
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if (TARGET_SAHF && (TARGET_USE_SAHF || optimize_function_for_size_p (cfun)))
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if (TARGET_SAHF && (TARGET_USE_SAHF || optimize_insn_for_size_p ()))
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return IX86_FPCMP_SAHF;
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return IX86_FPCMP_SAHF;
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return IX86_FPCMP_ARITH;
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return IX86_FPCMP_ARITH;
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@ -25193,7 +25193,9 @@ ix86_local_alignment (tree exp, enum machine_mode mode,
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other unit can not rely on the alignment.
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other unit can not rely on the alignment.
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Exclude va_list type. It is the common case of local array where
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Exclude va_list type. It is the common case of local array where
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we can not benefit from the alignment. */
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we can not benefit from the alignment.
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TODO: Probably one should optimize for size only when var is not escaping. */
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if (TARGET_64BIT && optimize_function_for_speed_p (cfun)
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if (TARGET_64BIT && optimize_function_for_speed_p (cfun)
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&& TARGET_SSE)
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&& TARGET_SSE)
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{
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{
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@ -667,10 +667,12 @@ optimize_mode_switching (void)
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REG_SET_TO_HARD_REG_SET (live_at_edge, df_get_live_out (src_bb));
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REG_SET_TO_HARD_REG_SET (live_at_edge, df_get_live_out (src_bb));
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rtl_profile_for_edge (eg);
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start_sequence ();
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start_sequence ();
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EMIT_MODE_SET (entity_map[j], mode, live_at_edge);
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EMIT_MODE_SET (entity_map[j], mode, live_at_edge);
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mode_set = get_insns ();
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mode_set = get_insns ();
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end_sequence ();
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end_sequence ();
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default_rtl_profile ();
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/* Do not bother to insert empty sequence. */
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/* Do not bother to insert empty sequence. */
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if (mode_set == NULL_RTX)
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if (mode_set == NULL_RTX)
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@ -713,6 +715,7 @@ optimize_mode_switching (void)
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{
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{
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rtx mode_set;
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rtx mode_set;
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rtl_profile_for_bb (bb);
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start_sequence ();
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start_sequence ();
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EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live);
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EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live);
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mode_set = get_insns ();
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mode_set = get_insns ();
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@ -727,6 +730,8 @@ optimize_mode_switching (void)
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else
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else
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emit_insn_before (mode_set, ptr->insn_ptr);
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emit_insn_before (mode_set, ptr->insn_ptr);
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}
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}
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default_rtl_profile ();
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}
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}
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free (ptr);
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free (ptr);
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