target.def (conditional_register_usage): Define.
* target.def (conditional_register_usage): Define. * reginfo.c (init_reg_sets_1): Call targetm.conditional_register_usage. * system.h (CONDITIONAL_REGISTER_USAGE): Poison. * doc/tm.texi.in (CONDITIONAL_REGISTER_USAGE): Adjust language for making it a hook. * doc/tm.texi: Regenerate. * config/alpha/alpha.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/alpha/alpha.c (alpha_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/arc/arc.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/arc/arc.c (arc_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/arm/arm.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/arm/arm.c (arm_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/bfin/bfin.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/bfin/bfin-protos.h (conditional_register_usage): Delete. * config/bfin/bfin.c (conditional_register_usage): Move code into... (bfin_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/cris/cris.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/cris/cris-protos.h (cris_conditional_register_usage): Delete. * config/cris/cris.c (cris_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/fr30/fr30.h (FIXED_REGISTERS): Adjust comment. * config/frv/frv.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/frv/frv-protos.h (frv_conditional_register_usage): Delete. * config/frv/frv.c (frv_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/h8300/h8300.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/h8300/h8300.c (h8300_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/i386/i386.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/i386/i386-protos.h (ix86_conditional_register_usage): Delete. * config/i386/i386.c (ix86_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/m32c/m32c.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/m32c/m32c-protos.h (m32c_conditional_register_usage): Delete. * config/m32c/m32c.c (m32c_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/m32r/m32r.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/m32r/m32r.c (m32r_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/m68hc11/m68hc11.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/m68hc11/m68hc11-protos.h (m68hc11_conditional_register_usage): Delete. * config/m68hc11/m68hc11.c (m68hc11_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/mep/mep.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/mep/mep-protos.h (mep_conditional_register_usage): Delete. * config/mep/mep.c (mep_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/mips/mips.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/mips/mips-protos.h (mips_conditional_register_usage): Delete. * config/mips/mips.c (mips_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/mmix/mmix.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/mmix/mmix-protos.h (mmix_conditional_register_usage): Delete. * config/mmix/mmix.c (mmix_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/mn10300/mn10300.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/mn10300/mn10300.c (mn10300_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/pa/pa32-regs.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/pa/pa64-regs.h (CONDITIONAL_REGISTER_USAGE): ...with this... * config/pa/pa.c (pa_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/pdp11/pdp11.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/pdp11/pdp11.c (pdp11_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/rs6000/rs6000.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/rs6000/rs6000-protos.h (rs6000_conditional_register_usage): Delete. * config/rs6000/rs6000.c (rs6000_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/rx/rx.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/rx/rx-protos.h (rx_conditional_register_usage): Delete. * config/rx/rx.c (rx_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/s390/s390.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/s390/s390-protos.h (s390_conditional_register_usage): Delete. * config/s390/s390.c (s390_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/score/score.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/score/score.c (score_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/sh/sh.c (sh_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/sparc/sparc.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/sparc/sparc.c (sparc_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/spu/spu.h (CONDITIONAL_REGISTER_USAGE): Delete. * config/spu/spu-protos.h (spu_conditional_register_usage): Delete. * config/spu/spu.c (spu_conditional_register_usage): Make static. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. * config/v850/v850.h (CONDITIONAL_REGISTER_USAGE): Move logic... * config/v850/v850.c (v850_conditional_register_usage): ...here. New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define. From-SVN: r167020
This commit is contained in:
parent
87921b81c0
commit
5efd84c503
73 changed files with 647 additions and 521 deletions
117
gcc/ChangeLog
117
gcc/ChangeLog
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@ -1,3 +1,120 @@
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2010-11-21 Nathan Froyd <froydnj@codesourcery.com>
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* target.def (conditional_register_usage): Define.
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* reginfo.c (init_reg_sets_1): Call
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targetm.conditional_register_usage.
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* system.h (CONDITIONAL_REGISTER_USAGE): Poison.
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* doc/tm.texi.in (CONDITIONAL_REGISTER_USAGE): Adjust language
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for making it a hook.
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* doc/tm.texi: Regenerate.
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* config/alpha/alpha.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/alpha/alpha.c (alpha_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/arc/arc.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/arc/arc.c (arc_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/arm/arm.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/arm/arm.c (arm_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/bfin/bfin.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/bfin/bfin-protos.h (conditional_register_usage): Delete.
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* config/bfin/bfin.c (conditional_register_usage): Move code into...
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(bfin_conditional_register_usage): ...here. New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/cris/cris.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/cris/cris-protos.h (cris_conditional_register_usage): Delete.
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* config/cris/cris.c (cris_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/fr30/fr30.h (FIXED_REGISTERS): Adjust comment.
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* config/frv/frv.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/frv/frv-protos.h (frv_conditional_register_usage): Delete.
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* config/frv/frv.c (frv_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/h8300/h8300.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/h8300/h8300.c (h8300_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/i386/i386.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/i386/i386-protos.h (ix86_conditional_register_usage): Delete.
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* config/i386/i386.c (ix86_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/m32c/m32c.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/m32c/m32c-protos.h (m32c_conditional_register_usage): Delete.
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* config/m32c/m32c.c (m32c_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/m32r/m32r.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/m32r/m32r.c (m32r_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/m68hc11/m68hc11.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/m68hc11/m68hc11-protos.h (m68hc11_conditional_register_usage):
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Delete.
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* config/m68hc11/m68hc11.c (m68hc11_conditional_register_usage): Make
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static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/mep/mep.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/mep/mep-protos.h (mep_conditional_register_usage): Delete.
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* config/mep/mep.c (mep_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/mips/mips.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/mips/mips-protos.h (mips_conditional_register_usage): Delete.
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* config/mips/mips.c (mips_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/mmix/mmix.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/mmix/mmix-protos.h (mmix_conditional_register_usage): Delete.
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* config/mmix/mmix.c (mmix_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/mn10300/mn10300.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/mn10300/mn10300.c (mn10300_conditional_register_usage):
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...here. New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/pa/pa32-regs.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/pa/pa64-regs.h (CONDITIONAL_REGISTER_USAGE): ...with this...
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* config/pa/pa.c (pa_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/pdp11/pdp11.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/pdp11/pdp11.c (pdp11_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/rs6000/rs6000.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/rs6000/rs6000-protos.h (rs6000_conditional_register_usage):
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Delete.
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* config/rs6000/rs6000.c (rs6000_conditional_register_usage): Make
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static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/rx/rx.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/rx/rx-protos.h (rx_conditional_register_usage): Delete.
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* config/rx/rx.c (rx_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/s390/s390.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/s390/s390-protos.h (s390_conditional_register_usage): Delete.
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* config/s390/s390.c (s390_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/score/score.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/score/score.c (score_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/sh/sh.c (sh_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/sparc/sparc.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/sparc/sparc.c (sparc_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/spu/spu.h (CONDITIONAL_REGISTER_USAGE): Delete.
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* config/spu/spu-protos.h (spu_conditional_register_usage): Delete.
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* config/spu/spu.c (spu_conditional_register_usage): Make static.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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* config/v850/v850.h (CONDITIONAL_REGISTER_USAGE): Move logic...
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* config/v850/v850.c (v850_conditional_register_usage): ...here.
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New function.
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(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
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2010-11-21 Jan Hubicka <jh@suse.cz>
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Dominique d'Humieres <dominiq@lps.ens.ft>
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@ -10974,6 +10974,17 @@ alpha_init_libfuncs (void)
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}
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}
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/* On the Alpha, we use this to disable the floating-point registers
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when they don't exist. */
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static void
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alpha_conditional_register_usage (void)
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{
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int i;
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if (! TARGET_FPREGS)
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for (i = 32; i < 63; i++)
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fixed_regs[i] = call_used_regs[i] = 1;
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}
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/* Initialize the GCC target structure. */
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#if TARGET_ABI_OPEN_VMS
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#undef TARGET_LEGITIMATE_ADDRESS_P
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#define TARGET_LEGITIMATE_ADDRESS_P alpha_legitimate_address_p
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#undef TARGET_CONDITIONAL_REGISTER_USAGE
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#define TARGET_CONDITIONAL_REGISTER_USAGE alpha_conditional_register_usage
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struct gcc_target targetm = TARGET_INITIALIZER;
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@ -204,19 +204,6 @@ extern enum alpha_fp_trap_mode alpha_fptm;
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{"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
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{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
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/* Define this macro to change register usage conditional on target flags.
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On the Alpha, we use this to disable the floating-point registers when
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they don't exist. */
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#define CONDITIONAL_REGISTER_USAGE \
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{ \
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int i; \
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if (! TARGET_FPREGS) \
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for (i = 32; i < 63; i++) \
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fixed_regs[i] = call_used_regs[i] = 1; \
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}
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/* target machine storage layout */
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@ -101,6 +101,7 @@ static void arc_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode,
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static unsigned int arc_function_arg_boundary (enum machine_mode, const_tree);
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static void arc_trampoline_init (rtx, tree, rtx);
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static void arc_option_override (void);
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static void arc_conditional_register_usage (void);
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/* ARC specific attributs. */
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@ -171,6 +172,9 @@ static const struct attribute_spec arc_attribute_table[] =
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#undef TARGET_TRAMPOLINE_INIT
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#define TARGET_TRAMPOLINE_INIT arc_trampoline_init
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#undef TARGET_CONDITIONAL_REGISTER_USAGE
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#define TARGET_CONDITIONAL_REGISTER_USAGE arc_conditional_register_usage
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struct gcc_target targetm = TARGET_INITIALIZER;
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/* Implement TARGET_HANDLE_OPTION. */
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emit_insn (gen_flush_icache (m_tramp));
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}
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/* Worker function for TARGET_CONDITIONAL_REGISTER_USAGE. */
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static void
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arc_conditional_register_usage (void)
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{
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if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
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{
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fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
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call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
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}
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}
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@ -260,16 +260,6 @@ if (GET_MODE_CLASS (MODE) == MODE_INT \
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48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, \
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27, 28, 29, 30 }
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/* Macro to conditionally modify fixed_regs/call_used_regs. */
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#define CONDITIONAL_REGISTER_USAGE \
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do { \
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if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \
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{ \
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fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
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call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
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} \
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} while (0)
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/* Return number of consecutive hard regs needed starting at reg REGNO
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to hold something of mode MODE.
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This is ordinarily the length in words of a value of mode MODE
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@ -248,6 +248,7 @@ static bool arm_builtin_support_vector_misalignment (enum machine_mode mode,
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const_tree type,
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int misalignment,
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bool is_packed);
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static void arm_conditional_register_usage (void);
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/* Table of machine attributes. */
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@ -571,6 +572,9 @@ static const struct default_options arm_option_optimization_table[] =
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#undef TARGET_CAN_ELIMINATE
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#define TARGET_CAN_ELIMINATE arm_can_eliminate
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#undef TARGET_CONDITIONAL_REGISTER_USAGE
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#define TARGET_CONDITIONAL_REGISTER_USAGE arm_conditional_register_usage
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#undef TARGET_CLASS_LIKELY_SPILLED_P
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#define TARGET_CLASS_LIKELY_SPILLED_P arm_class_likely_spilled_p
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is_packed);
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}
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static void
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arm_conditional_register_usage (void)
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{
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int regno;
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if (TARGET_SOFT_FLOAT || TARGET_THUMB1 || !TARGET_FPA)
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{
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for (regno = FIRST_FPA_REGNUM;
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regno <= LAST_FPA_REGNUM; ++regno)
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fixed_regs[regno] = call_used_regs[regno] = 1;
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}
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if (TARGET_THUMB1 && optimize_size)
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{
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/* When optimizing for size on Thumb-1, it's better not
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to use the HI regs, because of the overhead of
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stacking them. */
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for (regno = FIRST_HI_REGNUM;
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regno <= LAST_HI_REGNUM; ++regno)
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fixed_regs[regno] = call_used_regs[regno] = 1;
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}
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/* The link register can be clobbered by any branch insn,
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but we have no way to track that at present, so mark
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it as unavailable. */
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if (TARGET_THUMB1)
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fixed_regs[LR_REGNUM] = call_used_regs[LR_REGNUM] = 1;
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if (TARGET_32BIT && TARGET_HARD_FLOAT)
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{
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if (TARGET_MAVERICK)
|
||||
{
|
||||
for (regno = FIRST_FPA_REGNUM;
|
||||
regno <= LAST_FPA_REGNUM; ++ regno)
|
||||
fixed_regs[regno] = call_used_regs[regno] = 1;
|
||||
for (regno = FIRST_CIRRUS_FP_REGNUM;
|
||||
regno <= LAST_CIRRUS_FP_REGNUM; ++ regno)
|
||||
{
|
||||
fixed_regs[regno] = 0;
|
||||
call_used_regs[regno] = regno < FIRST_CIRRUS_FP_REGNUM + 4;
|
||||
}
|
||||
}
|
||||
if (TARGET_VFP)
|
||||
{
|
||||
/* VFPv3 registers are disabled when earlier VFP
|
||||
versions are selected due to the definition of
|
||||
LAST_VFP_REGNUM. */
|
||||
for (regno = FIRST_VFP_REGNUM;
|
||||
regno <= LAST_VFP_REGNUM; ++ regno)
|
||||
{
|
||||
fixed_regs[regno] = 0;
|
||||
call_used_regs[regno] = regno < FIRST_VFP_REGNUM + 16
|
||||
|| regno >= FIRST_VFP_REGNUM + 32;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (TARGET_REALLY_IWMMXT)
|
||||
{
|
||||
regno = FIRST_IWMMXT_GR_REGNUM;
|
||||
/* The 2002/10/09 revision of the XScale ABI has wCG0
|
||||
and wCG1 as call-preserved registers. The 2002/11/21
|
||||
revision changed this so that all wCG registers are
|
||||
scratch registers. */
|
||||
for (regno = FIRST_IWMMXT_GR_REGNUM;
|
||||
regno <= LAST_IWMMXT_GR_REGNUM; ++ regno)
|
||||
fixed_regs[regno] = 0;
|
||||
/* The XScale ABI has wR0 - wR9 as scratch registers,
|
||||
the rest as call-preserved registers. */
|
||||
for (regno = FIRST_IWMMXT_REGNUM;
|
||||
regno <= LAST_IWMMXT_REGNUM; ++ regno)
|
||||
{
|
||||
fixed_regs[regno] = 0;
|
||||
call_used_regs[regno] = regno < FIRST_IWMMXT_REGNUM + 10;
|
||||
}
|
||||
}
|
||||
|
||||
if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
|
||||
{
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
}
|
||||
else if (TARGET_APCS_STACK)
|
||||
{
|
||||
fixed_regs[10] = 1;
|
||||
call_used_regs[10] = 1;
|
||||
}
|
||||
/* -mcaller-super-interworking reserves r11 for calls to
|
||||
_interwork_r11_call_via_rN(). Making the register global
|
||||
is an easy way of ensuring that it remains valid for all
|
||||
calls. */
|
||||
if (TARGET_APCS_FRAME || TARGET_CALLER_INTERWORKING
|
||||
|| TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME)
|
||||
{
|
||||
fixed_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1;
|
||||
call_used_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1;
|
||||
if (TARGET_CALLER_INTERWORKING)
|
||||
global_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1;
|
||||
}
|
||||
SUBTARGET_CONDITIONAL_REGISTER_USAGE
|
||||
}
|
||||
|
||||
#include "gt-arm.h"
|
||||
|
|
|
@ -698,7 +698,7 @@ extern int arm_structure_size_boundary;
|
|||
elimination code won't get rid of sfp. It tracks
|
||||
fp exactly at all times.
|
||||
|
||||
*: See CONDITIONAL_REGISTER_USAGE */
|
||||
*: See TARGET_CONDITIONAL_REGISTER_USAGE */
|
||||
|
||||
/*
|
||||
mvf0 Cirrus floating point result
|
||||
|
@ -790,107 +790,6 @@ extern int arm_structure_size_boundary;
|
|||
#define SUBTARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#endif
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
int regno; \
|
||||
\
|
||||
if (TARGET_SOFT_FLOAT || TARGET_THUMB1 || !TARGET_FPA) \
|
||||
{ \
|
||||
for (regno = FIRST_FPA_REGNUM; \
|
||||
regno <= LAST_FPA_REGNUM; ++regno) \
|
||||
fixed_regs[regno] = call_used_regs[regno] = 1; \
|
||||
} \
|
||||
\
|
||||
if (TARGET_THUMB1 && optimize_size) \
|
||||
{ \
|
||||
/* When optimizing for size on Thumb-1, it's better not \
|
||||
to use the HI regs, because of the overhead of \
|
||||
stacking them. */ \
|
||||
for (regno = FIRST_HI_REGNUM; \
|
||||
regno <= LAST_HI_REGNUM; ++regno) \
|
||||
fixed_regs[regno] = call_used_regs[regno] = 1; \
|
||||
} \
|
||||
\
|
||||
/* The link register can be clobbered by any branch insn, \
|
||||
but we have no way to track that at present, so mark \
|
||||
it as unavailable. */ \
|
||||
if (TARGET_THUMB1) \
|
||||
fixed_regs[LR_REGNUM] = call_used_regs[LR_REGNUM] = 1; \
|
||||
\
|
||||
if (TARGET_32BIT && TARGET_HARD_FLOAT) \
|
||||
{ \
|
||||
if (TARGET_MAVERICK) \
|
||||
{ \
|
||||
for (regno = FIRST_FPA_REGNUM; \
|
||||
regno <= LAST_FPA_REGNUM; ++ regno) \
|
||||
fixed_regs[regno] = call_used_regs[regno] = 1; \
|
||||
for (regno = FIRST_CIRRUS_FP_REGNUM; \
|
||||
regno <= LAST_CIRRUS_FP_REGNUM; ++ regno) \
|
||||
{ \
|
||||
fixed_regs[regno] = 0; \
|
||||
call_used_regs[regno] = regno < FIRST_CIRRUS_FP_REGNUM + 4; \
|
||||
} \
|
||||
} \
|
||||
if (TARGET_VFP) \
|
||||
{ \
|
||||
/* VFPv3 registers are disabled when earlier VFP \
|
||||
versions are selected due to the definition of \
|
||||
LAST_VFP_REGNUM. */ \
|
||||
for (regno = FIRST_VFP_REGNUM; \
|
||||
regno <= LAST_VFP_REGNUM; ++ regno) \
|
||||
{ \
|
||||
fixed_regs[regno] = 0; \
|
||||
call_used_regs[regno] = regno < FIRST_VFP_REGNUM + 16 \
|
||||
|| regno >= FIRST_VFP_REGNUM + 32; \
|
||||
} \
|
||||
} \
|
||||
} \
|
||||
\
|
||||
if (TARGET_REALLY_IWMMXT) \
|
||||
{ \
|
||||
regno = FIRST_IWMMXT_GR_REGNUM; \
|
||||
/* The 2002/10/09 revision of the XScale ABI has wCG0 \
|
||||
and wCG1 as call-preserved registers. The 2002/11/21 \
|
||||
revision changed this so that all wCG registers are \
|
||||
scratch registers. */ \
|
||||
for (regno = FIRST_IWMMXT_GR_REGNUM; \
|
||||
regno <= LAST_IWMMXT_GR_REGNUM; ++ regno) \
|
||||
fixed_regs[regno] = 0; \
|
||||
/* The XScale ABI has wR0 - wR9 as scratch registers, \
|
||||
the rest as call-preserved registers. */ \
|
||||
for (regno = FIRST_IWMMXT_REGNUM; \
|
||||
regno <= LAST_IWMMXT_REGNUM; ++ regno) \
|
||||
{ \
|
||||
fixed_regs[regno] = 0; \
|
||||
call_used_regs[regno] = regno < FIRST_IWMMXT_REGNUM + 10; \
|
||||
} \
|
||||
} \
|
||||
\
|
||||
if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \
|
||||
{ \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
} \
|
||||
else if (TARGET_APCS_STACK) \
|
||||
{ \
|
||||
fixed_regs[10] = 1; \
|
||||
call_used_regs[10] = 1; \
|
||||
} \
|
||||
/* -mcaller-super-interworking reserves r11 for calls to \
|
||||
_interwork_r11_call_via_rN(). Making the register global \
|
||||
is an easy way of ensuring that it remains valid for all \
|
||||
calls. */ \
|
||||
if (TARGET_APCS_FRAME || TARGET_CALLER_INTERWORKING \
|
||||
|| TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME) \
|
||||
{ \
|
||||
fixed_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \
|
||||
call_used_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \
|
||||
if (TARGET_CALLER_INTERWORKING) \
|
||||
global_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \
|
||||
} \
|
||||
SUBTARGET_CONDITIONAL_REGISTER_USAGE \
|
||||
}
|
||||
|
||||
/* These are a couple of extensions to the formats accepted
|
||||
by asm_fprintf:
|
||||
%@ prints out ASM_COMMENT_START
|
||||
|
|
|
@ -87,7 +87,6 @@ extern bool bfin_longcall_p (rtx, int);
|
|||
extern bool bfin_dsp_memref_p (rtx);
|
||||
extern bool bfin_expand_movmem (rtx, rtx, rtx, rtx);
|
||||
|
||||
extern void conditional_register_usage (void);
|
||||
extern int bfin_register_move_cost (enum machine_mode, enum reg_class,
|
||||
enum reg_class);
|
||||
extern int bfin_memory_move_cost (enum machine_mode, enum reg_class, int in);
|
||||
|
|
|
@ -371,17 +371,6 @@ output_file_start (void)
|
|||
max_arg_registers = i; /* how many arg reg used */
|
||||
}
|
||||
|
||||
/* Called early in the compilation to conditionally modify
|
||||
fixed_regs/call_used_regs. */
|
||||
|
||||
void
|
||||
conditional_register_usage (void)
|
||||
{
|
||||
/* initialize condition code flag register rtx */
|
||||
bfin_cc_rtx = gen_rtx_REG (BImode, REG_CC);
|
||||
bfin_rets_rtx = gen_rtx_REG (Pmode, REG_RETS);
|
||||
}
|
||||
|
||||
/* Examine machine-dependent attributes of function type FUNTYPE and return its
|
||||
type. See the definition of E_FUNKIND. */
|
||||
|
||||
|
@ -6589,6 +6578,21 @@ bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED,
|
|||
|
||||
gcc_unreachable ();
|
||||
}
|
||||
|
||||
static void
|
||||
bfin_conditional_register_usage (void)
|
||||
{
|
||||
/* initialize condition code flag register rtx */
|
||||
bfin_cc_rtx = gen_rtx_REG (BImode, REG_CC);
|
||||
bfin_rets_rtx = gen_rtx_REG (Pmode, REG_RETS);
|
||||
if (TARGET_FDPIC)
|
||||
call_used_regs[FDPIC_REGNO] = 1;
|
||||
if (!TARGET_FDPIC && flag_pic)
|
||||
{
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
}
|
||||
}
|
||||
|
||||
#undef TARGET_INIT_BUILTINS
|
||||
#define TARGET_INIT_BUILTINS bfin_init_builtins
|
||||
|
@ -6691,6 +6695,9 @@ bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED,
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE bfin_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE bfin_conditional_register_usage
|
||||
|
||||
#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
|
||||
#define TARGET_ASM_TRAMPOLINE_TEMPLATE bfin_asm_trampoline_template
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
|
|
|
@ -498,19 +498,6 @@ extern const char *bfin_library_id_string;
|
|||
REG_LT0, REG_LT1, REG_LC0, REG_LC1, REG_LB0, REG_LB1 \
|
||||
}
|
||||
|
||||
/* Macro to conditionally modify fixed_regs/call_used_regs. */
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
conditional_register_usage(); \
|
||||
if (TARGET_FDPIC) \
|
||||
call_used_regs[FDPIC_REGNO] = 1; \
|
||||
if (!TARGET_FDPIC && flag_pic) \
|
||||
{ \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
} \
|
||||
}
|
||||
|
||||
/* Define the classes of registers for register constraints in the
|
||||
machine description. Also define ranges of constants.
|
||||
|
||||
|
|
|
@ -25,7 +25,6 @@ along with GCC; see the file COPYING3. If not see
|
|||
#define STDIO_INCLUDED
|
||||
#endif
|
||||
|
||||
extern void cris_conditional_register_usage (void);
|
||||
extern bool cris_simple_epilogue (void);
|
||||
#ifdef RTX_CODE
|
||||
extern const char *cris_op_str (rtx);
|
||||
|
|
|
@ -113,6 +113,8 @@ static void cris_print_operand_address (FILE *, rtx);
|
|||
|
||||
static bool cris_print_operand_punct_valid_p (unsigned char code);
|
||||
|
||||
static void cris_conditional_register_usage (void);
|
||||
|
||||
static void cris_asm_output_mi_thunk
|
||||
(FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
|
||||
|
||||
|
@ -187,6 +189,9 @@ static const struct default_options cris_option_optimization_table[] =
|
|||
#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
|
||||
#define TARGET_PRINT_OPERAND_PUNCT_VALID_P cris_print_operand_punct_valid_p
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE cris_conditional_register_usage
|
||||
|
||||
#undef TARGET_ASM_OUTPUT_MI_THUNK
|
||||
#define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
|
||||
#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
|
||||
|
@ -445,9 +450,9 @@ cris_store_multiple_op_p (rtx op)
|
|||
return true;
|
||||
}
|
||||
|
||||
/* The CONDITIONAL_REGISTER_USAGE worker. */
|
||||
/* The TARGET_CONDITIONAL_REGISTER_USAGE worker. */
|
||||
|
||||
void
|
||||
static void
|
||||
cris_conditional_register_usage (void)
|
||||
{
|
||||
/* FIXME: This isn't nice. We should be able to use that register for
|
||||
|
|
|
@ -431,9 +431,6 @@ extern int cris_cpu_version;
|
|||
#define CALL_USED_REGISTERS \
|
||||
{0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1}
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE cris_conditional_register_usage ()
|
||||
|
||||
|
||||
/* Node: Allocation Order */
|
||||
|
||||
/* We need this on CRIS, because call-used regs should be used first,
|
||||
|
|
|
@ -180,8 +180,9 @@ along with GCC; see the file COPYING3. If not see
|
|||
|
||||
The table initialized from this macro, and the table initialized by the
|
||||
following one, may be overridden at run time either automatically, by the
|
||||
actions of the macro `CONDITIONAL_REGISTER_USAGE', or by the user with the
|
||||
command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */
|
||||
actions of the macro `TARGET_CONDITIONAL_REGISTER_USAGE', or by the user
|
||||
with the command options `-ffixed-REG', `-fcall-used-REG' and
|
||||
`-fcall-saved-REG'. */
|
||||
#define FIXED_REGISTERS \
|
||||
{ 1, 0, 0, 0, 0, 0, 0, 0, /* 0 - 7 */ \
|
||||
0, 0, 0, 0, 0, 0, 0, 1, /* 8 - 15 */ \
|
||||
|
|
|
@ -38,7 +38,6 @@ extern frv_cpu_t frv_cpu_type; /* value of -mcpu= */
|
|||
/* Define functions defined in frv.c */
|
||||
extern void frv_expand_prologue (void);
|
||||
extern void frv_expand_epilogue (bool);
|
||||
extern void frv_conditional_register_usage (void);
|
||||
extern frv_stack_t *frv_stack_info (void);
|
||||
extern void frv_debug_stack (frv_stack_t *);
|
||||
extern int frv_initial_elimination_offset (int, int);
|
||||
|
|
|
@ -405,6 +405,7 @@ static reg_class_t frv_secondary_reload (bool, rtx, reg_class_t,
|
|||
secondary_reload_info *);
|
||||
static bool frv_frame_pointer_required (void);
|
||||
static bool frv_can_eliminate (const int, const int);
|
||||
static void frv_conditional_register_usage (void);
|
||||
static void frv_trampoline_init (rtx, tree, rtx);
|
||||
static bool frv_class_likely_spilled_p (reg_class_t);
|
||||
|
||||
|
@ -535,6 +536,9 @@ static const struct default_options frv_option_optimization_table[] =
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE frv_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE frv_conditional_register_usage
|
||||
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
#define TARGET_TRAMPOLINE_INIT frv_trampoline_init
|
||||
|
||||
|
@ -903,7 +907,7 @@ frv_string_begins_with (const_tree name, const char *prefix)
|
|||
switches, then GCC will automatically avoid using these registers when the
|
||||
target switches are opposed to them.) */
|
||||
|
||||
void
|
||||
static void
|
||||
frv_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
|
|
|
@ -784,28 +784,6 @@
|
|||
1, 1 /* 171-172, iacc0 */ \
|
||||
}
|
||||
|
||||
/* Zero or more C statements that may conditionally modify two variables
|
||||
`fixed_regs' and `call_used_regs' (both of type `char []') after they have
|
||||
been initialized from the two preceding macros.
|
||||
|
||||
This is necessary in case the fixed or call-clobbered registers depend on
|
||||
target flags.
|
||||
|
||||
You need not define this macro if it has no work to do.
|
||||
|
||||
If the usage of an entire class of registers depends on the target flags,
|
||||
you may indicate this to GCC by using this macro to modify `fixed_regs' and
|
||||
`call_used_regs' to 1 for each of the registers in the classes which should
|
||||
not be used by GCC. Also define the macro `REG_CLASS_FROM_LETTER' to return
|
||||
`NO_REGS' if it is called with a letter for a class that shouldn't be used.
|
||||
|
||||
(However, if this class is not included in `GENERAL_REGS' and all of the
|
||||
insn patterns whose constraints permit this class are controlled by target
|
||||
switches, then GCC will automatically avoid using these registers when the
|
||||
target switches are opposed to them.) */
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE frv_conditional_register_usage ()
|
||||
|
||||
|
||||
/* Order of allocation of registers. */
|
||||
|
||||
|
|
|
@ -1919,6 +1919,15 @@ h8300_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
|
|||
return (to == STACK_POINTER_REGNUM ? ! frame_pointer_needed : true);
|
||||
}
|
||||
|
||||
/* Conditionally modify register usage based on target flags. */
|
||||
|
||||
static void
|
||||
h8300_conditional_register_usage (void)
|
||||
{
|
||||
if (!TARGET_MAC)
|
||||
fixed_regs[MAC_REG] = call_used_regs[MAC_REG] = 1;
|
||||
}
|
||||
|
||||
/* Function for INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET).
|
||||
Define the offset between two registers, one to be eliminated, and
|
||||
the other its replacement, at the start of a routine. */
|
||||
|
@ -5954,6 +5963,9 @@ h8300_trampoline_init (rtx m_tramp, tree fndecl, rtx cxt)
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE h8300_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE h8300_conditional_register_usage
|
||||
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
#define TARGET_TRAMPOLINE_INIT h8300_trampoline_init
|
||||
|
||||
|
|
|
@ -244,12 +244,6 @@ extern const char * const *h8_reg_names;
|
|||
/* r0 r1 r2 r3 r4 r5 r6 r7 mac ap rap fp */ \
|
||||
{ 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10, 11 }
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
if (!TARGET_MAC) \
|
||||
fixed_regs[MAC_REG] = call_used_regs[MAC_REG] = 1; \
|
||||
}
|
||||
|
||||
#define HARD_REGNO_NREGS(REGNO, MODE) \
|
||||
h8300_hard_regno_nregs ((REGNO), (MODE))
|
||||
|
||||
|
|
|
@ -20,8 +20,6 @@ along with GCC; see the file COPYING3. If not see
|
|||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
/* Functions in i386.c */
|
||||
extern void ix86_conditional_register_usage (void);
|
||||
|
||||
extern bool ix86_target_stack_probe (void);
|
||||
extern bool ix86_can_use_return_insn_p (void);
|
||||
extern void ix86_setup_frame_addresses (void);
|
||||
|
|
|
@ -4114,7 +4114,7 @@ ix86_option_override (void)
|
|||
|
||||
/* Update register usage after having seen the compiler flags. */
|
||||
|
||||
void
|
||||
static void
|
||||
ix86_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
|
@ -5619,8 +5619,8 @@ ix86_asm_output_function_label (FILE *asm_out_file, const char *fname,
|
|||
extern void init_regs (void);
|
||||
|
||||
/* Implementation of call abi switching target hook. Specific to FNDECL
|
||||
the specific call register sets are set. See also CONDITIONAL_REGISTER_USAGE
|
||||
for more details. */
|
||||
the specific call register sets are set. See also
|
||||
ix86_conditional_register_usage for more details. */
|
||||
void
|
||||
ix86_call_abi_override (const_tree fndecl)
|
||||
{
|
||||
|
@ -34706,6 +34706,9 @@ ix86_autovectorize_vector_sizes (void)
|
|||
#undef TARGET_ASM_CODE_END
|
||||
#define TARGET_ASM_CODE_END ix86_code_end
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE ix86_conditional_register_usage
|
||||
|
||||
struct gcc_target targetm = TARGET_INITIALIZER;
|
||||
|
||||
#include "gt-i386.h"
|
||||
|
|
|
@ -899,7 +899,7 @@ enum target_cpu_default
|
|||
64 bit targets, one if the register if fixed on both 32 and 64
|
||||
bit targets, two if it is only fixed on 32bit targets and three
|
||||
if its only fixed on 64bit targets.
|
||||
Proper values are computed in the CONDITIONAL_REGISTER_USAGE.
|
||||
Proper values are computed in TARGET_CONDITIONAL_REGISTER_USAGE.
|
||||
*/
|
||||
#define FIXED_REGISTERS \
|
||||
/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \
|
||||
|
@ -927,7 +927,7 @@ enum target_cpu_default
|
|||
64 bit targets, one if the register if call used on both 32 and 64
|
||||
bit targets, two if it is only call used on 32bit targets and three
|
||||
if its only call used on 64bit targets.
|
||||
Proper values are computed in the CONDITIONAL_REGISTER_USAGE.
|
||||
Proper values are computed in TARGET_CONDITIONAL_REGISTER_USAGE.
|
||||
*/
|
||||
#define CALL_USED_REGISTERS \
|
||||
/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \
|
||||
|
@ -967,9 +967,6 @@ enum target_cpu_default
|
|||
|
||||
#define OVERRIDE_ABI_FORMAT(FNDECL) ix86_call_abi_override (FNDECL)
|
||||
|
||||
/* Macro to conditionally modify fixed_regs/call_used_regs. */
|
||||
#define CONDITIONAL_REGISTER_USAGE ix86_conditional_register_usage ()
|
||||
|
||||
/* Return number of consecutive hard regs needed starting at reg REGNO
|
||||
to hold something of mode MODE.
|
||||
This is ordinarily the length in words of a value of mode MODE
|
||||
|
@ -1251,7 +1248,8 @@ enum reg_class
|
|||
for a vector of HARD_REG_SET of length N_REG_CLASSES.
|
||||
|
||||
Note that the default setting of CLOBBERED_REGS is for 32-bit; this
|
||||
is adjusted by CONDITIONAL_REGISTER_USAGE for the 64-bit ABI in effect. */
|
||||
is adjusted by TARGET_CONDITIONAL_REGISTER_USAGE for the 64-bit ABI
|
||||
in effect. */
|
||||
|
||||
#define REG_CLASS_CONTENTS \
|
||||
{ { 0x00, 0x0 }, \
|
||||
|
|
|
@ -22,7 +22,6 @@
|
|||
#define MM enum machine_mode
|
||||
#define UINT unsigned int
|
||||
|
||||
void m32c_conditional_register_usage (void);
|
||||
int m32c_const_ok_for_constraint_p (HOST_WIDE_INT, char, const char *);
|
||||
UINT m32c_dwarf_frame_regnum (int);
|
||||
int m32c_eh_return_data_regno (int);
|
||||
|
|
|
@ -88,6 +88,7 @@ static rtx m32c_subreg (enum machine_mode, rtx, enum machine_mode, int);
|
|||
static int need_to_save (int);
|
||||
static rtx m32c_function_value (const_tree, const_tree, bool);
|
||||
static rtx m32c_libcall_value (enum machine_mode, const_rtx);
|
||||
static void m32c_conditional_register_usage (void);
|
||||
|
||||
/* Returns true if an address is specified, else false. */
|
||||
static bool m32c_get_pragma_address (const char *varname, unsigned *addr);
|
||||
|
@ -523,11 +524,13 @@ static struct
|
|||
{ 1, 1, 0, 0, 0 }, /* mem7 */
|
||||
};
|
||||
|
||||
/* Implements CONDITIONAL_REGISTER_USAGE. We adjust the number of
|
||||
available memregs, and select which registers need to be preserved
|
||||
/* Implements TARGET_CONDITIONAL_REGISTER_USAGE. We adjust the number
|
||||
of available memregs, and select which registers need to be preserved
|
||||
across calls based on the chip family. */
|
||||
|
||||
void
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE m32c_conditional_register_usage
|
||||
static void
|
||||
m32c_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
|
|
|
@ -228,8 +228,6 @@ machine_function;
|
|||
1, 1, 1, 1, \
|
||||
1, 1, 1, 1, 1, 1, 1, 1 }
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE m32c_conditional_register_usage ();
|
||||
|
||||
/* The *_REGNO theme matches m32c.md and most register number
|
||||
arguments; the PC_REGNUM is the odd one out. */
|
||||
#ifndef PC_REGNO
|
||||
|
|
|
@ -101,6 +101,7 @@ static rtx m32r_function_arg (CUMULATIVE_ARGS *, enum machine_mode,
|
|||
static void m32r_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode,
|
||||
const_tree, bool);
|
||||
static bool m32r_can_eliminate (const int, const int);
|
||||
static void m32r_conditional_register_usage (void);
|
||||
static void m32r_trampoline_init (rtx, tree, rtx);
|
||||
|
||||
/* M32R specific attributes. */
|
||||
|
@ -204,6 +205,9 @@ static const struct default_options m32r_option_optimization_table[] =
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE m32r_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE m32r_conditional_register_usage
|
||||
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
#define TARGET_TRAMPOLINE_INIT m32r_trampoline_init
|
||||
|
||||
|
@ -2837,3 +2841,13 @@ m32r_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
|
|||
gen_int_mode (TRAMPOLINE_SIZE, SImode), SImode,
|
||||
GEN_INT (3), SImode);
|
||||
}
|
||||
|
||||
static void
|
||||
m32r_conditional_register_usage (void)
|
||||
{
|
||||
if (flag_pic)
|
||||
{
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -456,30 +456,6 @@ extern enum m32r_sdata m32r_sdata;
|
|||
|
||||
#define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS
|
||||
|
||||
/* Zero or more C statements that may conditionally modify two variables
|
||||
`fixed_regs' and `call_used_regs' (both of type `char []') after they
|
||||
have been initialized from the two preceding macros.
|
||||
|
||||
This is necessary in case the fixed or call-clobbered registers depend
|
||||
on target flags.
|
||||
|
||||
You need not define this macro if it has no work to do. */
|
||||
|
||||
#ifdef SUBTARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define CONDITIONAL_REGISTER_USAGE SUBTARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#else
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
do \
|
||||
{ \
|
||||
if (flag_pic) \
|
||||
{ \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
} \
|
||||
} \
|
||||
while (0)
|
||||
#endif
|
||||
|
||||
/* If defined, an initializer for a vector of integers, containing the
|
||||
numbers of hard registers in the order in which GCC should
|
||||
prefer to use them (from most preferred to least). */
|
||||
|
|
|
@ -20,7 +20,6 @@ along with GCC; see the file COPYING3. If not see
|
|||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
|
||||
extern void m68hc11_conditional_register_usage (void);
|
||||
extern int hard_regno_mode_ok (int, enum machine_mode);
|
||||
extern int m68hc11_hard_regno_rename_ok (int, int);
|
||||
|
||||
|
|
|
@ -96,6 +96,7 @@ static void m68hc11_init_libfuncs (void);
|
|||
static rtx m68hc11_struct_value_rtx (tree, int);
|
||||
static bool m68hc11_return_in_memory (const_tree, const_tree);
|
||||
static bool m68hc11_can_eliminate (const int, const int);
|
||||
static void m68hc11_conditional_register_usage (void);
|
||||
static void m68hc11_trampoline_init (rtx, tree, rtx);
|
||||
|
||||
static rtx m68hc11_function_arg (CUMULATIVE_ARGS*, enum machine_mode,
|
||||
|
@ -302,6 +303,9 @@ static const struct attribute_spec m68hc11_attribute_table[] =
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE m68hc11_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE m68hc11_conditional_register_usage
|
||||
|
||||
#undef TARGET_CLASS_LIKELY_SPILLED_P
|
||||
#define TARGET_CLASS_LIKELY_SPILLED_P m68hc11_class_likely_spilled_p
|
||||
|
||||
|
@ -382,7 +386,10 @@ m68hc11_option_override (void)
|
|||
}
|
||||
|
||||
|
||||
void
|
||||
/* The soft-registers are disabled or enabled according to the
|
||||
-msoft-reg-count=<n> option. */
|
||||
|
||||
static void
|
||||
m68hc11_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
|
|
|
@ -372,14 +372,6 @@ SOFT_REG_FIRST+28, SOFT_REG_FIRST+29,SOFT_REG_FIRST+30,SOFT_REG_FIRST+31
|
|||
/* X, D, Y, SP,PC,A, B, CCR, Z, FP, ZTMP,ZR,XYR, D1 - 32, SOFT-FP, AP */
|
||||
|
||||
|
||||
/* Define this macro to change register usage conditional on target flags.
|
||||
|
||||
The soft-registers are disabled or enabled according to the
|
||||
-msoft-reg-count=<n> option. */
|
||||
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE (m68hc11_conditional_register_usage ())
|
||||
|
||||
/* List the order in which to allocate registers. Each register must be
|
||||
listed once, even those in FIXED_REGISTERS. */
|
||||
#define REG_ALLOC_ORDER \
|
||||
|
|
|
@ -133,6 +133,7 @@ static void m68k_sched_dfa_post_advance_cycle (void);
|
|||
static int m68k_sched_first_cycle_multipass_dfa_lookahead (void);
|
||||
|
||||
static bool m68k_can_eliminate (const int, const int);
|
||||
static void m68k_conditional_register_usage (void);
|
||||
static bool m68k_legitimate_address_p (enum machine_mode, rtx, bool);
|
||||
static bool m68k_handle_option (size_t, const char *, int);
|
||||
static void m68k_option_override (void);
|
||||
|
@ -278,6 +279,9 @@ const char *m68k_library_id_string = "_current_shared_library_a5_offset_";
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE m68k_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE m68k_conditional_register_usage
|
||||
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
#define TARGET_TRAMPOLINE_INIT m68k_trampoline_init
|
||||
|
||||
|
@ -6568,4 +6572,25 @@ m68k_return_pops_args (tree fundecl, tree funtype, int size)
|
|||
? size : 0);
|
||||
}
|
||||
|
||||
/* Make sure everything's fine if we *don't* have a given processor.
|
||||
This assumes that putting a register in fixed_regs will keep the
|
||||
compiler's mitts completely off it. We don't bother to zero it out
|
||||
of register classes. */
|
||||
|
||||
static void
|
||||
m68k_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
HARD_REG_SET x;
|
||||
if (!TARGET_HARD_FLOAT)
|
||||
{
|
||||
COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]);
|
||||
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
||||
if (TEST_HARD_REG_BIT (x, i))
|
||||
fixed_regs[i] = call_used_regs[i] = 1;
|
||||
}
|
||||
if (flag_pic)
|
||||
fixed_regs[PIC_REG] = call_used_regs[PIC_REG] = 1;
|
||||
}
|
||||
|
||||
#include "gt-m68k.h"
|
||||
|
|
|
@ -398,25 +398,6 @@ along with GCC; see the file COPYING3. If not see
|
|||
}
|
||||
|
||||
|
||||
/* Make sure everything's fine if we *don't* have a given processor.
|
||||
This assumes that putting a register in fixed_regs will keep the
|
||||
compiler's mitts completely off it. We don't bother to zero it out
|
||||
of register classes. */
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
int i; \
|
||||
HARD_REG_SET x; \
|
||||
if (!TARGET_HARD_FLOAT) \
|
||||
{ \
|
||||
COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
|
||||
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
|
||||
if (TEST_HARD_REG_BIT (x, i)) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
} \
|
||||
if (flag_pic) \
|
||||
fixed_regs[PIC_REG] = call_used_regs[PIC_REG] = 1; \
|
||||
}
|
||||
|
||||
/* On the m68k, ordinary registers hold 32 bits worth;
|
||||
for the 68881 registers, a single register is always enough for
|
||||
anything that can be stored in them at all. */
|
||||
|
|
|
@ -19,7 +19,6 @@ You should have received a copy of the GNU General Public License
|
|||
along with GCC; see the file COPYING3. If not see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
extern void mep_conditional_register_usage (void);
|
||||
extern int mep_regno_reg_class (int);
|
||||
extern int mep_reg_class_from_constraint (int, const char *);
|
||||
extern bool mep_const_ok_for_letter_p (HOST_WIDE_INT, int);
|
||||
|
|
|
@ -231,6 +231,7 @@ static tree mep_build_builtin_va_list (void);
|
|||
static void mep_expand_va_start (tree, rtx);
|
||||
static tree mep_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *);
|
||||
static bool mep_can_eliminate (const int, const int);
|
||||
static void mep_conditional_register_usage (void);
|
||||
static void mep_trampoline_init (rtx, tree, rtx);
|
||||
|
||||
#define WANT_GCC_DEFINITIONS
|
||||
|
@ -278,7 +279,7 @@ mep_set_leaf_registers (int enable)
|
|||
mep_leaf_registers[i] = enable;
|
||||
}
|
||||
|
||||
void
|
||||
static void
|
||||
mep_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
|
@ -7454,6 +7455,8 @@ mep_asm_init_sections (void)
|
|||
#define TARGET_GIMPLIFY_VA_ARG_EXPR mep_gimplify_va_arg_expr
|
||||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE mep_can_eliminate
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE mep_conditional_register_usage
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
#define TARGET_TRAMPOLINE_INIT mep_trampoline_init
|
||||
|
||||
|
|
|
@ -256,9 +256,6 @@ crtbegin.o%s"
|
|||
1, CALL_USED_SHADOW_REGISTERS \
|
||||
}
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
mep_conditional_register_usage ();
|
||||
|
||||
#define REG_ALLOC_ORDER { \
|
||||
/* core registers */ \
|
||||
3, 2, 1, 0, 9, 10, 11, 12, 4, 5, 6, 7, 8, 13, 14, 15, \
|
||||
|
|
|
@ -248,7 +248,6 @@ extern bool mips_expand_ext_as_unaligned_load (rtx, rtx, HOST_WIDE_INT,
|
|||
extern bool mips_expand_ins_as_unaligned_store (rtx, rtx, HOST_WIDE_INT,
|
||||
HOST_WIDE_INT);
|
||||
extern bool mips_mem_fits_mode_p (enum machine_mode mode, rtx x);
|
||||
extern void mips_conditional_register_usage (void);
|
||||
extern void mips_order_regs_for_local_alloc (void);
|
||||
extern HOST_WIDE_INT mips_debugger_offset (rtx, HOST_WIDE_INT);
|
||||
|
||||
|
|
|
@ -15926,9 +15926,9 @@ mips_swap_registers (unsigned int i)
|
|||
#undef SWAP_INT
|
||||
}
|
||||
|
||||
/* Implement CONDITIONAL_REGISTER_USAGE. */
|
||||
/* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */
|
||||
|
||||
void
|
||||
static void
|
||||
mips_conditional_register_usage (void)
|
||||
{
|
||||
|
||||
|
@ -16615,6 +16615,9 @@ mips_shift_truncation_mask (enum machine_mode mode)
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE mips_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE mips_conditional_register_usage
|
||||
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
#define TARGET_TRAMPOLINE_INIT mips_trampoline_init
|
||||
|
||||
|
|
|
@ -1085,8 +1085,6 @@ enum mips_code_readable_setting {
|
|||
/* The CACHE instruction is available. */
|
||||
#define ISA_HAS_CACHE (TARGET_CACHE_BUILTIN && !TARGET_MIPS16)
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE mips_conditional_register_usage ()
|
||||
|
||||
/* Tell collect what flags to pass to nm. */
|
||||
#ifndef NM_FLAGS
|
||||
#define NM_FLAGS "-Bn"
|
||||
|
@ -1518,8 +1516,8 @@ enum mips_code_readable_setting {
|
|||
Regarding coprocessor registers: without evidence to the contrary,
|
||||
it's best to assume that each coprocessor register has a unique
|
||||
use. This can be overridden, in, e.g., mips_option_override or
|
||||
CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
|
||||
for a particular target. */
|
||||
TARGET_CONDITIONAL_REGISTER_USAGE should the assumption be
|
||||
inappropriate for a particular target. */
|
||||
|
||||
#define FIXED_REGISTERS \
|
||||
{ \
|
||||
|
|
|
@ -45,7 +45,6 @@ extern void mmix_asm_output_skip (FILE *, int);
|
|||
extern void mmix_asm_output_align (FILE *, int);
|
||||
extern int mmix_shiftable_wyde_value (unsigned HOST_WIDEST_INT);
|
||||
extern void mmix_output_register_setting (FILE *, int, HOST_WIDEST_INT, int);
|
||||
extern void mmix_conditional_register_usage (void);
|
||||
extern int mmix_opposite_regno (int, int);
|
||||
extern int mmix_local_regno (int);
|
||||
extern unsigned mmix_dbx_register_number (unsigned);
|
||||
|
|
|
@ -159,6 +159,7 @@ static bool mmix_pass_by_reference (CUMULATIVE_ARGS *,
|
|||
static bool mmix_frame_pointer_required (void);
|
||||
static void mmix_asm_trampoline_template (FILE *);
|
||||
static void mmix_trampoline_init (rtx, tree, rtx);
|
||||
static void mmix_conditional_register_usage (void);
|
||||
|
||||
/* TARGET_OPTION_OPTIMIZATION_TABLE. */
|
||||
|
||||
|
@ -212,6 +213,9 @@ static const struct default_options mmix_option_optimization_table[] =
|
|||
#undef TARGET_ASM_OUTPUT_SOURCE_FILENAME
|
||||
#define TARGET_ASM_OUTPUT_SOURCE_FILENAME mmix_asm_output_source_filename
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage
|
||||
|
||||
#undef TARGET_RTX_COSTS
|
||||
#define TARGET_RTX_COSTS mmix_rtx_costs
|
||||
#undef TARGET_ADDRESS_COST
|
||||
|
@ -337,9 +341,9 @@ mmix_local_alignment (tree type ATTRIBUTE_UNUSED, unsigned basic_align)
|
|||
return basic_align;
|
||||
}
|
||||
|
||||
/* CONDITIONAL_REGISTER_USAGE. */
|
||||
/* TARGET_CONDITIONAL_REGISTER_USAGE. */
|
||||
|
||||
void
|
||||
static void
|
||||
mmix_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
|
|
|
@ -275,8 +275,6 @@ struct GTY(()) machine_function
|
|||
1, 1, 1, 1, 1, 1, 1 \
|
||||
}
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE mmix_conditional_register_usage ()
|
||||
|
||||
#define INCOMING_REGNO(OUT) mmix_opposite_regno (OUT, 0)
|
||||
|
||||
#define OUTGOING_REGNO(IN) mmix_opposite_regno (IN, 1)
|
||||
|
|
|
@ -2475,6 +2475,28 @@ mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
|
|||
/* Extract the latency value from the timings attribute. */
|
||||
return timings < 100 ? (timings % 10) : (timings % 100);
|
||||
}
|
||||
|
||||
static void
|
||||
mn10300_conditional_register_usage (void)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
if (!TARGET_AM33)
|
||||
{
|
||||
for (i = FIRST_EXTENDED_REGNUM;
|
||||
i <= LAST_EXTENDED_REGNUM; i++)
|
||||
fixed_regs[i] = call_used_regs[i] = 1;
|
||||
}
|
||||
if (!TARGET_AM33_2)
|
||||
{
|
||||
for (i = FIRST_FP_REGNUM;
|
||||
i <= LAST_FP_REGNUM; i++)
|
||||
fixed_regs[i] = call_used_regs[i] = 1;
|
||||
}
|
||||
if (flag_pic)
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] =
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
}
|
||||
|
||||
/* Initialize the GCC target structure. */
|
||||
|
||||
|
@ -2561,4 +2583,7 @@ mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost)
|
|||
#undef TARGET_SCHED_ADJUST_COST
|
||||
#define TARGET_SCHED_ADJUST_COST mn10300_adjust_sched_cost
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE mn10300_conditional_register_usage
|
||||
|
||||
struct gcc_target targetm = TARGET_INITIALIZER;
|
||||
|
|
|
@ -202,27 +202,6 @@ extern enum processor_type mn10300_tune_cpu;
|
|||
, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 51 \
|
||||
}
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
unsigned int i; \
|
||||
\
|
||||
if (!TARGET_AM33) \
|
||||
{ \
|
||||
for (i = FIRST_EXTENDED_REGNUM; \
|
||||
i <= LAST_EXTENDED_REGNUM; i++) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
} \
|
||||
if (!TARGET_AM33_2) \
|
||||
{ \
|
||||
for (i = FIRST_FP_REGNUM; \
|
||||
i <= LAST_FP_REGNUM; i++) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
} \
|
||||
if (flag_pic) \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = \
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;\
|
||||
}
|
||||
|
||||
/* Return number of consecutive hard regs needed starting at reg REGNO
|
||||
to hold something of mode MODE.
|
||||
|
||||
|
|
|
@ -181,6 +181,7 @@ static rtx pa_delegitimize_address (rtx);
|
|||
static bool pa_print_operand_punct_valid_p (unsigned char);
|
||||
static rtx pa_internal_arg_pointer (void);
|
||||
static bool pa_can_eliminate (const int, const int);
|
||||
static void pa_conditional_register_usage (void);
|
||||
|
||||
/* The following extra sections are only used for SOM. */
|
||||
static GTY(()) section *som_readonly_data_section;
|
||||
|
@ -386,6 +387,8 @@ static const struct default_options pa_option_optimization_table[] =
|
|||
#define TARGET_INTERNAL_ARG_POINTER pa_internal_arg_pointer
|
||||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE pa_can_eliminate
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE pa_conditional_register_usage
|
||||
|
||||
struct gcc_target targetm = TARGET_INITIALIZER;
|
||||
|
||||
|
@ -10176,4 +10179,25 @@ pa_initial_elimination_offset (int from, int to)
|
|||
return offset;
|
||||
}
|
||||
|
||||
static void
|
||||
pa_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (!TARGET_64BIT && !TARGET_PA_11)
|
||||
{
|
||||
for (i = 56; i <= FP_REG_LAST; i++)
|
||||
fixed_regs[i] = call_used_regs[i] = 1;
|
||||
for (i = 33; i < 56; i += 2)
|
||||
fixed_regs[i] = call_used_regs[i] = 1;
|
||||
}
|
||||
if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)
|
||||
{
|
||||
for (i = FP_REG_FIRST; i <= FP_REG_LAST; i++)
|
||||
fixed_regs[i] = call_used_regs[i] = 1;
|
||||
}
|
||||
if (flag_pic)
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
}
|
||||
|
||||
#include "gt-pa.h"
|
||||
|
|
|
@ -121,25 +121,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
|||
/* shift register and soft frame pointer */ \
|
||||
1, 1}
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
int i; \
|
||||
if (!TARGET_PA_11) \
|
||||
{ \
|
||||
for (i = 56; i < 88; i++) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
for (i = 33; i < 88; i += 2) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
} \
|
||||
if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\
|
||||
{ \
|
||||
for (i = 32; i < 88; i++) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
} \
|
||||
if (flag_pic) \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
}
|
||||
|
||||
/* Allocate the call used registers first. This should minimize
|
||||
the number of registers that need to be saved (as call used
|
||||
registers will generally not be allocated across a call).
|
||||
|
|
|
@ -101,18 +101,6 @@ along with GCC; see the file COPYING3. If not see
|
|||
/* shift register and soft frame pointer */ \
|
||||
1, 1}
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
int i; \
|
||||
if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\
|
||||
{ \
|
||||
for (i = FP_REG_FIRST; i <= FP_REG_LAST; i++)\
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
} \
|
||||
if (flag_pic) \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
}
|
||||
|
||||
/* Allocate the call used registers first. This should minimize
|
||||
the number of registers that need to be saved (as call used
|
||||
registers will generally not be allocated across a call).
|
||||
|
|
|
@ -156,6 +156,7 @@ static rtx pdp11_function_arg (CUMULATIVE_ARGS *, enum machine_mode,
|
|||
const_tree, bool);
|
||||
static void pdp11_function_arg_advance (CUMULATIVE_ARGS *,
|
||||
enum machine_mode, const_tree, bool);
|
||||
static void pdp11_conditional_register_usage (void);
|
||||
|
||||
/* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
|
||||
|
||||
|
@ -230,6 +231,9 @@ static const struct default_options pdp11_option_optimization_table[] =
|
|||
|
||||
#undef TARGET_LEGITIMATE_ADDRESS_P
|
||||
#define TARGET_LEGITIMATE_ADDRESS_P pdp11_legitimate_address_p
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE pdp11_conditional_register_usage
|
||||
|
||||
/* Implement TARGET_HANDLE_OPTION. */
|
||||
|
||||
|
@ -2101,4 +2105,37 @@ pdp11_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
|
|||
: int_size_in_bytes (type));
|
||||
}
|
||||
|
||||
/* Make sure everything's fine if we *don't* have an FPU.
|
||||
This assumes that putting a register in fixed_regs will keep the
|
||||
compiler's mitts completely off it. We don't bother to zero it out
|
||||
of register classes. Also fix incompatible register naming with
|
||||
the UNIX assembler. */
|
||||
|
||||
static void
|
||||
pdp11_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
HARD_REG_SET x;
|
||||
if (!TARGET_FPU)
|
||||
{
|
||||
COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]);
|
||||
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ )
|
||||
if (TEST_HARD_REG_BIT (x, i))
|
||||
fixed_regs[i] = call_used_regs[i] = 1;
|
||||
}
|
||||
|
||||
if (TARGET_AC0)
|
||||
call_used_regs[AC0_REGNUM] = 1;
|
||||
if (TARGET_UNIX_ASM)
|
||||
{
|
||||
/* Change names of FPU registers for the UNIX assembler. */
|
||||
reg_names[8] = "fr0";
|
||||
reg_names[9] = "fr1";
|
||||
reg_names[10] = "fr2";
|
||||
reg_names[11] = "fr3";
|
||||
reg_names[12] = "fr4";
|
||||
reg_names[13] = "fr5";
|
||||
}
|
||||
}
|
||||
|
||||
struct gcc_target targetm = TARGET_INITIALIZER;
|
||||
|
|
|
@ -168,38 +168,6 @@ extern const struct real_format pdp11_d_format;
|
|||
0, 0, 0, 0, 0, 0, 1, 1 }
|
||||
|
||||
|
||||
/* Make sure everything's fine if we *don't* have an FPU.
|
||||
This assumes that putting a register in fixed_regs will keep the
|
||||
compiler's mitts completely off it. We don't bother to zero it out
|
||||
of register classes. Also fix incompatible register naming with
|
||||
the UNIX assembler.
|
||||
*/
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
int i; \
|
||||
HARD_REG_SET x; \
|
||||
if (!TARGET_FPU) \
|
||||
{ \
|
||||
COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]); \
|
||||
for (i = R0_REGNUM; i < FIRST_PSEUDO_REGISTER; i++ ) \
|
||||
if (TEST_HARD_REG_BIT (x, i)) \
|
||||
fixed_regs[i] = call_used_regs[i] = 1; \
|
||||
} \
|
||||
\
|
||||
if (TARGET_AC0) \
|
||||
call_used_regs[AC0_REGNUM] = 1; \
|
||||
if (TARGET_UNIX_ASM) \
|
||||
{ \
|
||||
/* Change names of FPU registers for the UNIX assembler. */ \
|
||||
reg_names[8] = "fr0"; \
|
||||
reg_names[9] = "fr1"; \
|
||||
reg_names[10] = "fr2"; \
|
||||
reg_names[11] = "fr3"; \
|
||||
reg_names[12] = "fr4"; \
|
||||
reg_names[13] = "fr5"; \
|
||||
} \
|
||||
}
|
||||
|
||||
/* Return number of consecutive hard regs needed starting at reg REGNO
|
||||
to hold something of mode MODE.
|
||||
This is ordinarily the length in words of a value of mode MODE
|
||||
|
|
|
@ -167,7 +167,6 @@ extern void rs6000_emit_epilogue (int);
|
|||
extern void rs6000_emit_eh_reg_restore (rtx, rtx);
|
||||
extern const char * output_isel (rtx *);
|
||||
extern bool rs6000_tls_referenced_p (rtx);
|
||||
extern void rs6000_conditional_register_usage (void);
|
||||
|
||||
extern void rs6000_aix_asm_output_dwarf_table_ref (char *);
|
||||
|
||||
|
|
|
@ -1202,6 +1202,7 @@ static const reg_class_t *rs6000_ira_cover_classes (void);
|
|||
const int INSN_NOT_AVAILABLE = -1;
|
||||
static enum machine_mode rs6000_eh_return_filter_mode (void);
|
||||
static bool rs6000_can_eliminate (const int, const int);
|
||||
static void rs6000_conditional_register_usage (void);
|
||||
static void rs6000_trampoline_init (rtx, tree, rtx);
|
||||
|
||||
/* Hash table stuff for keeping track of TOC entries. */
|
||||
|
@ -1630,6 +1631,9 @@ static const struct default_options rs6000_option_optimization_table[] =
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE rs6000_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE rs6000_conditional_register_usage
|
||||
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
#define TARGET_TRAMPOLINE_INIT rs6000_trampoline_init
|
||||
|
||||
|
@ -6989,7 +6993,7 @@ rs6000_offsettable_memref_p (rtx op)
|
|||
}
|
||||
|
||||
/* Change register usage conditional on target flags. */
|
||||
void
|
||||
static void
|
||||
rs6000_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
|
|
|
@ -1102,11 +1102,6 @@ extern unsigned rs6000_pointer_size;
|
|||
|
||||
#define FIXED_SCRATCH 0
|
||||
|
||||
/* Define this macro to change register usage conditional on target
|
||||
flags. */
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE rs6000_conditional_register_usage ()
|
||||
|
||||
/* Specify the registers used for certain standard purposes.
|
||||
The values of these macros are register numbers. */
|
||||
|
||||
|
|
|
@ -25,7 +25,6 @@
|
|||
#define Mmode enum machine_mode
|
||||
#define Fargs CUMULATIVE_ARGS
|
||||
|
||||
extern void rx_conditional_register_usage (void);
|
||||
extern void rx_expand_prologue (void);
|
||||
extern int rx_initial_elimination_offset (int, int);
|
||||
|
||||
|
|
|
@ -933,7 +933,7 @@ is_naked_func (const_tree decl)
|
|||
|
||||
static bool use_fixed_regs = false;
|
||||
|
||||
void
|
||||
static void
|
||||
rx_conditional_register_usage (void)
|
||||
{
|
||||
static bool using_fixed_regs = false;
|
||||
|
@ -2847,6 +2847,9 @@ rx_memory_move_cost (enum machine_mode mode, reg_class_t regclass, bool in)
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE rx_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE rx_conditional_register_usage
|
||||
|
||||
#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
|
||||
#define TARGET_ASM_TRAMPOLINE_TEMPLATE rx_trampoline_template
|
||||
|
||||
|
|
|
@ -245,9 +245,6 @@ enum reg_class
|
|||
1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
|
||||
}
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
rx_conditional_register_usage ()
|
||||
|
||||
#define LIBCALL_VALUE(MODE) \
|
||||
gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
|
||||
|| GET_MODE_SIZE (MODE) >= 4) \
|
||||
|
|
|
@ -38,7 +38,6 @@ extern HOST_WIDE_INT s390_initial_elimination_offset (int, int);
|
|||
extern void s390_emit_prologue (void);
|
||||
extern void s390_emit_epilogue (bool);
|
||||
extern void s390_function_profiler (FILE *, int);
|
||||
extern void s390_conditional_register_usage (void);
|
||||
extern void s390_set_has_landing_pad_p (bool);
|
||||
extern bool s390_hard_regno_mode_ok (unsigned int, enum machine_mode);
|
||||
extern bool s390_hard_regno_rename_ok (unsigned int, unsigned int);
|
||||
|
|
|
@ -9742,9 +9742,9 @@ s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
|
|||
return insn;
|
||||
}
|
||||
|
||||
/* Implement CONDITIONAL_REGISTER_USAGE. */
|
||||
/* Implement TARGET_CONDITIONAL_REGISTER_USAGE. */
|
||||
|
||||
void
|
||||
static void
|
||||
s390_conditional_register_usage (void)
|
||||
{
|
||||
int i;
|
||||
|
@ -10648,6 +10648,9 @@ s390_loop_unroll_adjust (unsigned nunroll, struct loop *loop)
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE s390_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage
|
||||
|
||||
#undef TARGET_LOOP_UNROLL_ADJUST
|
||||
#define TARGET_LOOP_UNROLL_ADJUST s390_loop_unroll_adjust
|
||||
|
||||
|
|
|
@ -373,8 +373,6 @@ extern int s390_arch_flags;
|
|||
1, 1, 1, 1, \
|
||||
0, 0 }
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
|
||||
|
||||
/* Preferred register allocation order. */
|
||||
#define REG_ALLOC_ORDER \
|
||||
{ 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \
|
||||
|
|
|
@ -138,6 +138,9 @@ static const struct default_options score_option_optimization_table[] =
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE score_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE score_conditional_register_usage
|
||||
|
||||
#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
|
||||
#define TARGET_ASM_TRAMPOLINE_TEMPLATE score_asm_trampoline_template
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
|
@ -1232,4 +1235,12 @@ score_block_move (rtx *ops)
|
|||
return false;
|
||||
}
|
||||
|
||||
static void
|
||||
score_conditional_register_usage (void)
|
||||
{
|
||||
if (!flag_pic)
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] =
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 0;
|
||||
}
|
||||
|
||||
struct gcc_target targetm = TARGET_INITIALIZER;
|
||||
|
|
|
@ -218,7 +218,7 @@
|
|||
Regarding coprocessor registers: without evidence to the contrary,
|
||||
it's best to assume that each coprocessor register has a unique
|
||||
use. This can be overridden, in, e.g., TARGET_OPTION_OVERRIDE or
|
||||
CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
|
||||
TARGET_CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
|
||||
for a particular target. */
|
||||
|
||||
/* Control Registers, use mfcr/mtcr insn
|
||||
|
@ -305,13 +305,6 @@
|
|||
/* Macro to conditionally modify fixed_regs/call_used_regs. */
|
||||
#define PIC_OFFSET_TABLE_REGNUM 29
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
if (!flag_pic) \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = \
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 0; \
|
||||
}
|
||||
|
||||
#define HARD_REGNO_NREGS(REGNO, MODE) \
|
||||
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
||||
|
||||
|
|
|
@ -298,6 +298,7 @@ static void sh_encode_section_info (tree, rtx, int);
|
|||
static int sh2a_function_vector_p (tree);
|
||||
static void sh_trampoline_init (rtx, tree, rtx);
|
||||
static rtx sh_trampoline_adjust_address (rtx);
|
||||
static void sh_conditional_register_usage (void);
|
||||
|
||||
static const struct attribute_spec sh_attribute_table[] =
|
||||
{
|
||||
|
@ -588,6 +589,9 @@ static const struct default_options sh_option_optimization_table[] =
|
|||
#undef TARGET_SECONDARY_RELOAD
|
||||
#define TARGET_SECONDARY_RELOAD sh_secondary_reload
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE sh_conditional_register_usage
|
||||
|
||||
#undef TARGET_LEGITIMATE_ADDRESS_P
|
||||
#define TARGET_LEGITIMATE_ADDRESS_P sh_legitimate_address_p
|
||||
|
||||
|
@ -12415,6 +12419,54 @@ sh_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i,
|
|||
return NO_REGS;
|
||||
}
|
||||
|
||||
static void
|
||||
sh_conditional_register_usage (void)
|
||||
{
|
||||
int regno;
|
||||
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno ++)
|
||||
if (! VALID_REGISTER_P (regno))
|
||||
fixed_regs[regno] = call_used_regs[regno] = 1;
|
||||
/* R8 and R9 are call-clobbered on SH5, but not on earlier SH ABIs. */
|
||||
if (TARGET_SH5)
|
||||
{
|
||||
call_used_regs[FIRST_GENERAL_REG + 8]
|
||||
= call_used_regs[FIRST_GENERAL_REG + 9] = 1;
|
||||
call_really_used_regs[FIRST_GENERAL_REG + 8]
|
||||
= call_really_used_regs[FIRST_GENERAL_REG + 9] = 1;
|
||||
}
|
||||
if (TARGET_SHMEDIA)
|
||||
{
|
||||
regno_reg_class[FIRST_GENERAL_REG] = GENERAL_REGS;
|
||||
CLEAR_HARD_REG_SET (reg_class_contents[FP0_REGS]);
|
||||
regno_reg_class[FIRST_FP_REG] = FP_REGS;
|
||||
}
|
||||
if (flag_pic)
|
||||
{
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
}
|
||||
/* Renesas saves and restores mac registers on call. */
|
||||
if (TARGET_HITACHI && ! TARGET_NOMACSAVE)
|
||||
{
|
||||
call_really_used_regs[MACH_REG] = 0;
|
||||
call_really_used_regs[MACL_REG] = 0;
|
||||
}
|
||||
for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0);
|
||||
regno <= LAST_FP_REG; regno += 2)
|
||||
SET_HARD_REG_BIT (reg_class_contents[DF_HI_REGS], regno);
|
||||
if (TARGET_SHMEDIA)
|
||||
{
|
||||
for (regno = FIRST_TARGET_REG; regno <= LAST_TARGET_REG; regno ++)
|
||||
if (! fixed_regs[regno] && call_really_used_regs[regno])
|
||||
SET_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], regno);
|
||||
}
|
||||
else
|
||||
for (regno = FIRST_GENERAL_REG; regno <= LAST_GENERAL_REG; regno++)
|
||||
if (! fixed_regs[regno] && call_really_used_regs[regno])
|
||||
SET_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], regno);
|
||||
}
|
||||
|
||||
|
||||
enum sh_divide_strategy_e sh_div_strategy = SH_DIV_STRATEGY_DEFAULT;
|
||||
|
||||
#include "gt-sh.h"
|
||||
|
|
|
@ -106,51 +106,6 @@ do { \
|
|||
#define SUBTARGET_FRAME_POINTER_REQUIRED 0
|
||||
#endif
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE do \
|
||||
{ \
|
||||
int regno; \
|
||||
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno ++) \
|
||||
if (! VALID_REGISTER_P (regno)) \
|
||||
fixed_regs[regno] = call_used_regs[regno] = 1; \
|
||||
/* R8 and R9 are call-clobbered on SH5, but not on earlier SH ABIs. */ \
|
||||
if (TARGET_SH5) \
|
||||
{ \
|
||||
call_used_regs[FIRST_GENERAL_REG + 8] \
|
||||
= call_used_regs[FIRST_GENERAL_REG + 9] = 1; \
|
||||
call_really_used_regs[FIRST_GENERAL_REG + 8] \
|
||||
= call_really_used_regs[FIRST_GENERAL_REG + 9] = 1; \
|
||||
} \
|
||||
if (TARGET_SHMEDIA) \
|
||||
{ \
|
||||
regno_reg_class[FIRST_GENERAL_REG] = GENERAL_REGS; \
|
||||
CLEAR_HARD_REG_SET (reg_class_contents[FP0_REGS]); \
|
||||
regno_reg_class[FIRST_FP_REG] = FP_REGS; \
|
||||
} \
|
||||
if (flag_pic) \
|
||||
{ \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
} \
|
||||
/* Renesas saves and restores mac registers on call. */ \
|
||||
if (TARGET_HITACHI && ! TARGET_NOMACSAVE) \
|
||||
{ \
|
||||
call_really_used_regs[MACH_REG] = 0; \
|
||||
call_really_used_regs[MACL_REG] = 0; \
|
||||
} \
|
||||
for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0); \
|
||||
regno <= LAST_FP_REG; regno += 2) \
|
||||
SET_HARD_REG_BIT (reg_class_contents[DF_HI_REGS], regno); \
|
||||
if (TARGET_SHMEDIA) \
|
||||
{ \
|
||||
for (regno = FIRST_TARGET_REG; regno <= LAST_TARGET_REG; regno ++)\
|
||||
if (! fixed_regs[regno] && call_really_used_regs[regno]) \
|
||||
SET_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], regno); \
|
||||
} \
|
||||
else \
|
||||
for (regno = FIRST_GENERAL_REG; regno <= LAST_GENERAL_REG; regno++) \
|
||||
if (! fixed_regs[regno] && call_really_used_regs[regno]) \
|
||||
SET_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], regno); \
|
||||
} while (0)
|
||||
|
||||
/* Nonzero if this is an ELF target - compile time only */
|
||||
#define TARGET_ELF 0
|
||||
|
@ -806,8 +761,8 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
|
|||
(GENERAL_REGISTER_P (REGNO) || FP_REGISTER_P (REGNO) \
|
||||
|| TARGET_REGISTER_P (REGNO))
|
||||
|
||||
/* This is to be used in CONDITIONAL_REGISTER_USAGE, to mark registers
|
||||
that should be fixed. */
|
||||
/* This is to be used in TARGET_CONDITIONAL_REGISTER_USAGE, to mark
|
||||
registers that should be fixed. */
|
||||
#define VALID_REGISTER_P(REGNO) \
|
||||
(SHMEDIA_REGISTER_P (REGNO) || XD_REGISTER_P (REGNO) \
|
||||
|| (REGNO) == AP_REG || (REGNO) == RAP_REG \
|
||||
|
@ -908,8 +863,8 @@ extern char sh_additional_register_names[ADDREGNAMES_SIZE] \
|
|||
1, 1, \
|
||||
}
|
||||
|
||||
/* CONDITIONAL_REGISTER_USAGE might want to make a register call-used, yet
|
||||
fixed, like PIC_OFFSET_TABLE_REGNUM. */
|
||||
/* TARGET_CONDITIONAL_REGISTER_USAGE might want to make a register
|
||||
call-used, yet fixed, like PIC_OFFSET_TABLE_REGNUM. */
|
||||
#define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS
|
||||
|
||||
/* Only the lower 32-bits of R10-R14 are guaranteed to be preserved
|
||||
|
@ -1147,7 +1102,7 @@ enum reg_class
|
|||
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00300000 }, \
|
||||
/* FPUL_REGS: */ \
|
||||
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000 }, \
|
||||
/* SIBCALL_REGS: Initialized in CONDITIONAL_REGISTER_USAGE. */ \
|
||||
/* SIBCALL_REGS: Initialized in TARGET_CONDITIONAL_REGISTER_USAGE. */ \
|
||||
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, \
|
||||
/* GENERAL_REGS: */ \
|
||||
{ 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0x03020000 }, \
|
||||
|
@ -1155,7 +1110,7 @@ enum reg_class
|
|||
{ 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000 }, \
|
||||
/* FP_REGS: */ \
|
||||
{ 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x00000000 }, \
|
||||
/* DF_HI_REGS: Initialized in CONDITIONAL_REGISTER_USAGE. */ \
|
||||
/* DF_HI_REGS: Initialized in TARGET_CONDITIONAL_REGISTER_USAGE. */ \
|
||||
{ 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x0000ff00 }, \
|
||||
/* DF_REGS: */ \
|
||||
{ 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x0000ff00 }, \
|
||||
|
|
|
@ -441,6 +441,7 @@ static void sparc_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
|
|||
static void sparc_file_end (void);
|
||||
static bool sparc_frame_pointer_required (void);
|
||||
static bool sparc_can_eliminate (const int, const int);
|
||||
static void sparc_conditional_register_usage (void);
|
||||
#ifdef TARGET_ALTERNATE_LONG_DOUBLE_MANGLING
|
||||
static const char *sparc_mangle_type (const_tree);
|
||||
#endif
|
||||
|
@ -639,6 +640,9 @@ static const struct default_options sparc_option_optimization_table[] =
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE sparc_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE sparc_conditional_register_usage
|
||||
|
||||
#ifdef TARGET_ALTERNATE_LONG_DOUBLE_MANGLING
|
||||
#undef TARGET_MANGLE_TYPE
|
||||
#define TARGET_MANGLE_TYPE sparc_mangle_type
|
||||
|
@ -9621,4 +9625,54 @@ sparc_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
|
|||
|| !targetm.frame_pointer_required ());
|
||||
}
|
||||
|
||||
/* If !TARGET_FPU, then make the fp registers and fp cc regs fixed so that
|
||||
they won't be allocated. */
|
||||
|
||||
static void
|
||||
sparc_conditional_register_usage (void)
|
||||
{
|
||||
if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
|
||||
{
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
|
||||
}
|
||||
/* If the user has passed -f{fixed,call-{used,saved}}-g5 */
|
||||
/* then honor it. */
|
||||
if (TARGET_ARCH32 && fixed_regs[5])
|
||||
fixed_regs[5] = 1;
|
||||
else if (TARGET_ARCH64 && fixed_regs[5] == 2)
|
||||
fixed_regs[5] = 0;
|
||||
if (! TARGET_V9)
|
||||
{
|
||||
int regno;
|
||||
for (regno = SPARC_FIRST_V9_FP_REG;
|
||||
regno <= SPARC_LAST_V9_FP_REG;
|
||||
regno++)
|
||||
fixed_regs[regno] = 1;
|
||||
/* %fcc0 is used by v8 and v9. */
|
||||
for (regno = SPARC_FIRST_V9_FCC_REG + 1;
|
||||
regno <= SPARC_LAST_V9_FCC_REG;
|
||||
regno++)
|
||||
fixed_regs[regno] = 1;
|
||||
}
|
||||
if (! TARGET_FPU)
|
||||
{
|
||||
int regno;
|
||||
for (regno = 32; regno < SPARC_LAST_V9_FCC_REG; regno++)
|
||||
fixed_regs[regno] = 1;
|
||||
}
|
||||
/* If the user has passed -f{fixed,call-{used,saved}}-g2 */
|
||||
/* then honor it. Likewise with g3 and g4. */
|
||||
if (fixed_regs[2] == 2)
|
||||
fixed_regs[2] = ! TARGET_APP_REGS;
|
||||
if (fixed_regs[3] == 2)
|
||||
fixed_regs[3] = ! TARGET_APP_REGS;
|
||||
if (TARGET_ARCH32 && fixed_regs[4] == 2)
|
||||
fixed_regs[4] = ! TARGET_APP_REGS;
|
||||
else if (TARGET_CM_EMBMEDANY)
|
||||
fixed_regs[4] = 1;
|
||||
else if (fixed_regs[4] == 2)
|
||||
fixed_regs[4] = 0;
|
||||
}
|
||||
|
||||
#include "gt-sparc.h"
|
||||
|
|
|
@ -517,7 +517,8 @@ extern enum cmodel sparc_cmodel;
|
|||
|
||||
/* MASK_APP_REGS must always be the default because that's what
|
||||
FIXED_REGISTERS is set to and -ffixed- is processed before
|
||||
CONDITIONAL_REGISTER_USAGE is called (where we process -mno-app-regs). */
|
||||
TARGET_CONDITIONAL_REGISTER_USAGE is called (where we process
|
||||
-mno-app-regs). */
|
||||
#define TARGET_DEFAULT (MASK_APP_REGS + MASK_FPU)
|
||||
|
||||
/* Processor type.
|
||||
|
@ -756,7 +757,7 @@ extern struct sparc_cpu_select sparc_select[];
|
|||
stack frames.
|
||||
|
||||
Registers fixed in arch32 and not arch64 (or vice-versa) are marked in
|
||||
CONDITIONAL_REGISTER_USAGE in order to properly handle -ffixed-.
|
||||
TARGET_CONDITIONAL_REGISTER_USAGE in order to properly handle -ffixed-.
|
||||
*/
|
||||
|
||||
#define FIXED_REGISTERS \
|
||||
|
@ -802,57 +803,6 @@ extern struct sparc_cpu_select sparc_select[];
|
|||
\
|
||||
1, 1, 1, 1, 1, 1}
|
||||
|
||||
/* If !TARGET_FPU, then make the fp registers and fp cc regs fixed so that
|
||||
they won't be allocated. */
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
do \
|
||||
{ \
|
||||
if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \
|
||||
{ \
|
||||
fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
|
||||
} \
|
||||
/* If the user has passed -f{fixed,call-{used,saved}}-g5 */ \
|
||||
/* then honor it. */ \
|
||||
if (TARGET_ARCH32 && fixed_regs[5]) \
|
||||
fixed_regs[5] = 1; \
|
||||
else if (TARGET_ARCH64 && fixed_regs[5] == 2) \
|
||||
fixed_regs[5] = 0; \
|
||||
if (! TARGET_V9) \
|
||||
{ \
|
||||
int regno; \
|
||||
for (regno = SPARC_FIRST_V9_FP_REG; \
|
||||
regno <= SPARC_LAST_V9_FP_REG; \
|
||||
regno++) \
|
||||
fixed_regs[regno] = 1; \
|
||||
/* %fcc0 is used by v8 and v9. */ \
|
||||
for (regno = SPARC_FIRST_V9_FCC_REG + 1; \
|
||||
regno <= SPARC_LAST_V9_FCC_REG; \
|
||||
regno++) \
|
||||
fixed_regs[regno] = 1; \
|
||||
} \
|
||||
if (! TARGET_FPU) \
|
||||
{ \
|
||||
int regno; \
|
||||
for (regno = 32; regno < SPARC_LAST_V9_FCC_REG; regno++) \
|
||||
fixed_regs[regno] = 1; \
|
||||
} \
|
||||
/* If the user has passed -f{fixed,call-{used,saved}}-g2 */ \
|
||||
/* then honor it. Likewise with g3 and g4. */ \
|
||||
if (fixed_regs[2] == 2) \
|
||||
fixed_regs[2] = ! TARGET_APP_REGS; \
|
||||
if (fixed_regs[3] == 2) \
|
||||
fixed_regs[3] = ! TARGET_APP_REGS; \
|
||||
if (TARGET_ARCH32 && fixed_regs[4] == 2) \
|
||||
fixed_regs[4] = ! TARGET_APP_REGS; \
|
||||
else if (TARGET_CM_EMBMEDANY) \
|
||||
fixed_regs[4] = 1; \
|
||||
else if (fixed_regs[4] == 2) \
|
||||
fixed_regs[4] = 0; \
|
||||
} \
|
||||
while (0)
|
||||
|
||||
/* Return number of consecutive hard regs needed starting at reg REGNO
|
||||
to hold something of mode MODE.
|
||||
This is ordinarily the length in words of a value of mode MODE
|
||||
|
|
|
@ -58,7 +58,6 @@ extern rtx spu_function_value (const_tree type, const_tree func);
|
|||
extern void spu_setup_incoming_varargs (int *cum, enum machine_mode mode,
|
||||
tree type, int *pretend_size,
|
||||
int no_rtl);
|
||||
extern void spu_conditional_register_usage (void);
|
||||
extern int spu_expand_mov (rtx * ops, enum machine_mode mode);
|
||||
extern int spu_split_load (rtx * ops);
|
||||
extern int spu_split_store (rtx * ops);
|
||||
|
|
|
@ -231,6 +231,7 @@ static section *spu_select_section (tree, int, unsigned HOST_WIDE_INT);
|
|||
static void spu_unique_section (tree, int);
|
||||
static rtx spu_expand_load (rtx, rtx, rtx, int);
|
||||
static void spu_trampoline_init (rtx, tree, rtx);
|
||||
static void spu_conditional_register_usage (void);
|
||||
|
||||
/* Which instruction set architecture to use. */
|
||||
int spu_arch;
|
||||
|
@ -489,6 +490,9 @@ static const struct attribute_spec spu_attribute_table[] =
|
|||
#undef TARGET_EXCEPT_UNWIND_INFO
|
||||
#define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE spu_conditional_register_usage
|
||||
|
||||
struct gcc_target targetm = TARGET_INITIALIZER;
|
||||
|
||||
static void
|
||||
|
@ -4285,7 +4289,7 @@ spu_setup_incoming_varargs (CUMULATIVE_ARGS * cum, enum machine_mode mode,
|
|||
}
|
||||
}
|
||||
|
||||
void
|
||||
static void
|
||||
spu_conditional_register_usage (void)
|
||||
{
|
||||
if (flag_pic)
|
||||
|
|
|
@ -167,9 +167,6 @@ extern GTY(()) int spu_tune;
|
|||
1, 1, 1 \
|
||||
}
|
||||
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
spu_conditional_register_usage()
|
||||
|
||||
|
||||
/* Values in Registers */
|
||||
|
||||
|
|
|
@ -3064,6 +3064,20 @@ v850_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
|
|||
return (to == STACK_POINTER_REGNUM ? ! frame_pointer_needed : true);
|
||||
}
|
||||
|
||||
/* Worker function for TARGET_CONDITIONAL_REGISTER_USAGE.
|
||||
|
||||
If TARGET_APP_REGS is not defined then add r2 and r5 to
|
||||
the pool of fixed registers. See PR 14505. */
|
||||
|
||||
static void
|
||||
v850_conditional_register_usage (void)
|
||||
{
|
||||
if (TARGET_APP_REGS)
|
||||
{
|
||||
fixed_regs[2] = 0; call_used_regs[2] = 0;
|
||||
fixed_regs[5] = 0; call_used_regs[5] = 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Worker function for TARGET_ASM_TRAMPOLINE_TEMPLATE. */
|
||||
|
||||
|
@ -3194,6 +3208,9 @@ static const struct attribute_spec v850_attribute_table[] =
|
|||
#undef TARGET_CAN_ELIMINATE
|
||||
#define TARGET_CAN_ELIMINATE v850_can_eliminate
|
||||
|
||||
#undef TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
#define TARGET_CONDITIONAL_REGISTER_USAGE v850_conditional_register_usage
|
||||
|
||||
#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
|
||||
#define TARGET_ASM_TRAMPOLINE_TEMPLATE v850_asm_trampoline_template
|
||||
#undef TARGET_TRAMPOLINE_INIT
|
||||
|
|
|
@ -256,18 +256,6 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
|
|||
34, 35 \
|
||||
}
|
||||
|
||||
/* If TARGET_APP_REGS is not defined then add r2 and r5 to
|
||||
the pool of fixed registers. See PR 14505. */
|
||||
#define CONDITIONAL_REGISTER_USAGE \
|
||||
{ \
|
||||
if (TARGET_APP_REGS) \
|
||||
{ \
|
||||
fixed_regs[2] = 0; call_used_regs[2] = 0; \
|
||||
fixed_regs[5] = 0; call_used_regs[5] = 1; \
|
||||
} \
|
||||
}
|
||||
|
||||
|
||||
/* Return number of consecutive hard regs needed starting at reg REGNO
|
||||
to hold something of mode MODE.
|
||||
|
||||
|
|
|
@ -1916,8 +1916,8 @@ preserve the entire contents of a register across a call.
|
|||
@findex global_regs
|
||||
@findex reg_names
|
||||
@findex reg_class_contents
|
||||
@defmac CONDITIONAL_REGISTER_USAGE
|
||||
Zero or more C statements that may conditionally modify five variables
|
||||
@deftypefn {Target Hook} void TARGET_CONDITIONAL_REGISTER_USAGE (void)
|
||||
This hook may conditionally modify five variables
|
||||
@code{fixed_regs}, @code{call_used_regs}, @code{global_regs},
|
||||
@code{reg_names}, and @code{reg_class_contents}, to take into account
|
||||
any dependence of these register sets on target flags. The first three
|
||||
|
@ -1932,8 +1932,6 @@ from @code{FIXED_REGISTERS}, @code{CALL_USED_REGISTERS},
|
|||
@option{-fcall-used-@var{reg}} and @option{-fcall-saved-@var{reg}}
|
||||
command options have been applied.
|
||||
|
||||
You need not define this macro if it has no work to do.
|
||||
|
||||
@cindex disabling certain registers
|
||||
@cindex controlling register usage
|
||||
If the usage of an entire class of registers depends on the target
|
||||
|
@ -1948,7 +1946,7 @@ is called with a letter for a class that shouldn't be used.
|
|||
of the insn patterns whose constraints permit this class are
|
||||
controlled by target switches, then GCC will automatically avoid using
|
||||
these registers when the target switches are opposed to them.)
|
||||
@end defmac
|
||||
@end deftypefn
|
||||
|
||||
@defmac INCOMING_REGNO (@var{out})
|
||||
Define this macro if the target machine has register windows. This C
|
||||
|
|
|
@ -1906,8 +1906,8 @@ preserve the entire contents of a register across a call.
|
|||
@findex global_regs
|
||||
@findex reg_names
|
||||
@findex reg_class_contents
|
||||
@defmac CONDITIONAL_REGISTER_USAGE
|
||||
Zero or more C statements that may conditionally modify five variables
|
||||
@hook TARGET_CONDITIONAL_REGISTER_USAGE
|
||||
This hook may conditionally modify five variables
|
||||
@code{fixed_regs}, @code{call_used_regs}, @code{global_regs},
|
||||
@code{reg_names}, and @code{reg_class_contents}, to take into account
|
||||
any dependence of these register sets on target flags. The first three
|
||||
|
@ -1922,8 +1922,6 @@ from @code{FIXED_REGISTERS}, @code{CALL_USED_REGISTERS},
|
|||
@option{-fcall-used-@var{reg}} and @option{-fcall-saved-@var{reg}}
|
||||
command options have been applied.
|
||||
|
||||
You need not define this macro if it has no work to do.
|
||||
|
||||
@cindex disabling certain registers
|
||||
@cindex controlling register usage
|
||||
If the usage of an entire class of registers depends on the target
|
||||
|
@ -1938,7 +1936,7 @@ is called with a letter for a class that shouldn't be used.
|
|||
of the insn patterns whose constraints permit this class are
|
||||
controlled by target switches, then GCC will automatically avoid using
|
||||
these registers when the target switches are opposed to them.)
|
||||
@end defmac
|
||||
@end deftypefn
|
||||
|
||||
@defmac INCOMING_REGNO (@var{out})
|
||||
Define this macro if the target machine has register windows. This C
|
||||
|
|
|
@ -342,12 +342,9 @@ init_reg_sets_1 (void)
|
|||
inv_reg_alloc_order[reg_alloc_order[i]] = i;
|
||||
#endif
|
||||
|
||||
/* This macro allows the fixed or call-used registers
|
||||
and the register classes to depend on target flags. */
|
||||
/* Let the target tweak things if necessary. */
|
||||
|
||||
#ifdef CONDITIONAL_REGISTER_USAGE
|
||||
CONDITIONAL_REGISTER_USAGE;
|
||||
#endif
|
||||
targetm.conditional_register_usage ();
|
||||
|
||||
/* Compute number of hard regs in each class. */
|
||||
|
||||
|
|
|
@ -784,7 +784,7 @@ extern void fancy_abort (const char *, int, const char *) ATTRIBUTE_NORETURN;
|
|||
ASM_DECLARE_CONSTANT_NAME MODIFY_TARGET_NAME SWITCHES_NEED_SPACES \
|
||||
SWITCH_CURTAILS_COMPILATION SWITCH_TAKES_ARG WORD_SWITCH_TAKES_ARG \
|
||||
TARGET_OPTION_TRANSLATE_TABLE HANDLE_PRAGMA_PACK_PUSH_POP \
|
||||
HANDLE_SYSV_PRAGMA HANDLE_PRAGMA_WEAK
|
||||
HANDLE_SYSV_PRAGMA HANDLE_PRAGMA_WEAK CONDITIONAL_REGISTER_USAGE
|
||||
|
||||
/* Hooks that are no longer used. */
|
||||
#pragma GCC poison LANG_HOOKS_FUNCTION_MARK LANG_HOOKS_FUNCTION_FREE \
|
||||
|
|
|
@ -2258,6 +2258,15 @@ DEFHOOK
|
|||
bool, (const int from_reg, const int to_reg),
|
||||
hook_bool_const_int_const_int_true)
|
||||
|
||||
/* Modify any or all of fixed_regs, call_used_regs, global_regs,
|
||||
reg_names, and reg_class_contents to account of the vagaries of the
|
||||
target. */
|
||||
DEFHOOK
|
||||
(conditional_register_usage,
|
||||
"",
|
||||
void, (void),
|
||||
hook_void_void)
|
||||
|
||||
/* Functions specific to the C family of frontends. */
|
||||
#undef HOOK_PREFIX
|
||||
#define HOOK_PREFIX "TARGET_C_"
|
||||
|
|
Loading…
Add table
Reference in a new issue