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rs6000: Make constant formation a tiny bit better

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If we cannot load a constant into a register in one insn, and that
constant is a valid mask (for rotate instructions), we currently
prefer to load -1 and then mask it.  This patch makes us not do that if
instead we could use two add or or instructions, since those are
sometimes faster on certain CPUs (and never are slower).


	* config/rs6000/rs6000.md (splitter to load of -1 and mask): Don't
	use this splitter if two add or or instructions would also work for
	the constant we want to generate.

From-SVN: r248265
This commit is contained in:
Segher Boessenkool 2017-05-19 13:29:21 +02:00 • committed by Segher Boessenkool
parent 3a6461f307
commit 5d3ae76af1
2 changed files with 7 additions and 0 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2017-05-19 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (splitter to load of -1 and mask): Don't
use this splitter if two add or or instructions would also work for
the constant we want to generate.
2017-05-19 Richard Biener <rguenther@suse.de>
PR build/80821

1
gcc/config/rs6000/rs6000.md
View file

@ -8732,6 +8732,7 @@
(match_operand:DI 1 "const_int_operand"))]
"TARGET_POWERPC64
&& num_insns_constant (operands[1], DImode) > 1
&& !IN_RANGE (INTVAL (operands[1]), -0x80000000, 0xffffffff)
&& rs6000_is_valid_and_mask (operands[1], DImode)"
[(set (match_dup 0)
(const_int -1))