diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0e81d1af04e..bbe300f6f60 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2012-01-27 Richard Henderson + + * target.def (TARGET_ATOMIC_TEST_AND_SET_TRUEVAL): New. + * c-cppbuiltin.c (cpp_atomic_builtins): Define + __GCC_ATOMIC_TEST_AND_SET_TRUEVAL. + * doc/tm.texi.in (TARGET_ATOMIC_TEST_AND_SET_TRUEVAL): Add doc hook. + * doc/tm.texi: Rebuild. + 2012-01-27 Richard Henderson * optabs.c (gen_atomic_test_and_set): Remove default. diff --git a/gcc/c-family/c-cppbuiltin.c b/gcc/c-family/c-cppbuiltin.c index 7e7b9c15876..608dba6ecd4 100644 --- a/gcc/c-family/c-cppbuiltin.c +++ b/gcc/c-family/c-cppbuiltin.c @@ -670,6 +670,11 @@ cpp_atomic_builtins (cpp_reader *pfile) builtin_define_with_int_value ("__GCC_ATOMIC_LLONG_LOCK_FREE", (have_swap[SWAP_INDEX (long_long_integer_type_node)]? 2 : 1)); + /* If we're dealing with a "set" value that doesn't exactly correspond + to a boolean truth value, let the library work around that. */ + builtin_define_with_int_value ("__GCC_ATOMIC_TEST_AND_SET_TRUEVAL", + targetm.atomic_test_and_set_trueval); + /* ptr_type_node can't be used here since ptr_mode is only set when toplev calls backend_init which is not done with -E or pch. */ psize = POINTER_SIZE / BITS_PER_UNIT; diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index ceb0d1ea4de..91e4b047fe5 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -11359,3 +11359,7 @@ value of @code{TARGET_CONST_ANCHOR} is a power of 2. For example, on MIPS, where add-immediate takes a 16-bit signed value, @code{TARGET_CONST_ANCHOR} is set to @samp{0x8000}. The default value is zero, which disables this optimization. @end deftypevr + +@deftypevr {Target Hook} {unsigned char} TARGET_ATOMIC_TEST_AND_SET_TRUEVAL +This value should be set if the result written by @code{atomic_test_and_set} is not exactly 1, i.e. the @code{bool} @code{true}. +@end deftypevr diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index 55c8432c3bf..0ebc15d5ebf 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -11237,3 +11237,5 @@ value of @code{TARGET_CONST_ANCHOR} is a power of 2. For example, on MIPS, where add-immediate takes a 16-bit signed value, @code{TARGET_CONST_ANCHOR} is set to @samp{0x8000}. The default value is zero, which disables this optimization. @end deftypevr + +@hook TARGET_ATOMIC_TEST_AND_SET_TRUEVAL diff --git a/gcc/target.def b/gcc/target.def index f86f782b020..6084b21dca5 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -2667,6 +2667,13 @@ DEFHOOK enum unwind_info_type, (void), default_debug_unwind_info) +DEFHOOKPOD +(atomic_test_and_set_trueval, + "This value should be set if the result written by\ + @code{atomic_test_and_set} is not exactly 1, i.e. the\ + @code{bool} @code{true}.", + unsigned char, 1) + /* Leave the boolean fields at the end. */ /* True if we can create zeroed data by switching to a BSS section