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expmed.c (lowpart_bit_field_p): Fix comment.

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* expmed.c (lowpart_bit_field_p): Fix comment.
	(store_bit_field_using_insv): Fix formatting.
	(store_bit_field): Likewise.
	(store_fixed_bit_field): More declaration and remove return.
	(store_fixed_bit_field_1): Fix formatting.
	(extract_fixed_bit_field): Move declaration.
	(extract_fixed_bit_field_1): Simplify.

From-SVN: r206044
This commit is contained in:
Eric Botcazou 2013-12-17 12:11:40 +00:00 • committed by Eric Botcazou
parent 61dd6a2e33
commit 548cfdc2ca
2 changed files with 21 additions and 18 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2013-12-17 Eric Botcazou <ebotcazou@adacore.com>
* expmed.c (lowpart_bit_field_p): Fix comment.
(store_bit_field_using_insv): Fix formatting.
(store_bit_field): Likewise.
(store_fixed_bit_field): More declaration and remove return.
(store_fixed_bit_field_1): Fix formatting.
(extract_fixed_bit_field): Move declaration.
(extract_fixed_bit_field_1): Simplify.
2013-12-17 Jan Hubicka <hubicka@ucw.cz>
* ipa-utils.h (possible_polymorphic_call_targets): Determine context of

29
gcc/expmed.c
View file

@ -422,7 +422,7 @@ lowpart_bit_field_p (unsigned HOST_WIDE_INT bitnum,
return bitnum % BITS_PER_WORD == 0;
}
/* Return true if -fstrict-volatile-bitfields applies an access of OP0
/* Return true if -fstrict-volatile-bitfields applies to an access of OP0
containing BITSIZE bits starting at BITNUM, with field mode FIELDMODE.
Return false if the access would touch memory outside the range
BITREGION_START to BITREGION_END for conformance to the C++ memory
@ -490,7 +490,8 @@ simple_mem_bitfield_p (rtx op0, unsigned HOST_WIDE_INT bitsize,
static bool
store_bit_field_using_insv (const extraction_insn *insv, rtx op0,
unsigned HOST_WIDE_INT bitsize,
unsigned HOST_WIDE_INT bitnum, rtx value)
unsigned HOST_WIDE_INT bitnum,
rtx value)
{
struct expand_operand ops[4];
rtx value1;
@ -940,7 +941,6 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
if (strict_volatile_bitfield_p (str_rtx, bitsize, bitnum, fieldmode,
bitregion_start, bitregion_end))
{
/* Storing any naturally aligned field can be done with a simple
store. For targets that support fast unaligned memory, any
naturally sized, unit aligned field can be done directly. */
@ -957,8 +957,7 @@ store_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
/* Explicitly override the C/C++ memory model; ignore the
bit range so that we can do the access in the mode mandated
by -fstrict-volatile-bitfields instead. */
store_fixed_bit_field_1 (str_rtx, bitsize, bitnum,
value);
store_fixed_bit_field_1 (str_rtx, bitsize, bitnum, value);
}
return;
@ -1002,8 +1001,6 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
unsigned HOST_WIDE_INT bitregion_end,
rtx value)
{
enum machine_mode mode;
/* There is a case not handled here:
a structure with a known alignment of just a halfword
and a field split across two aligned halfwords within the structure.
@ -1013,7 +1010,7 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
if (MEM_P (op0))
{
mode = GET_MODE (op0);
enum machine_mode mode = GET_MODE (op0);
if (GET_MODE_BITSIZE (mode) == 0
|| GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (word_mode))
mode = word_mode;
@ -1033,7 +1030,6 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
}
store_fixed_bit_field_1 (op0, bitsize, bitnum, value);
return;
}
/* Helper function for store_fixed_bit_field, stores
@ -1041,8 +1037,8 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
static void
store_fixed_bit_field_1 (rtx op0, unsigned HOST_WIDE_INT bitsize,
unsigned HOST_WIDE_INT bitnum,
rtx value)
unsigned HOST_WIDE_INT bitnum,
rtx value)
{
enum machine_mode mode;
rtx temp;
@ -1793,12 +1789,11 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
unsigned HOST_WIDE_INT bitnum, rtx target,
int unsignedp)
{
enum machine_mode mode;
if (MEM_P (op0))
{
mode = get_best_mode (bitsize, bitnum, 0, 0,
MEM_ALIGN (op0), word_mode, MEM_VOLATILE_P (op0));
enum machine_mode mode
= get_best_mode (bitsize, bitnum, 0, 0, MEM_ALIGN (op0), word_mode,
MEM_VOLATILE_P (op0));
if (mode == VOIDmode)
/* The only way this should occur is if the field spans word
@ -1821,9 +1816,7 @@ extract_fixed_bit_field_1 (enum machine_mode tmode, rtx op0,
unsigned HOST_WIDE_INT bitnum, rtx target,
int unsignedp)
{
enum machine_mode mode;
mode = GET_MODE (op0);
enum machine_mode mode = GET_MODE (op0);
gcc_assert (SCALAR_INT_MODE_P (mode));
/* Note that bitsize + bitnum can be greater than GET_MODE_BITSIZE (mode)