MSP430: Add defaulting to the insn length attribute
The length of MSP430 instructions is mostly just a function of the type and number of operands. Setting the "type" attribute on all insns describes the number of operands, and the position of the source and destination operands. In most cases, defaulting in the "length" and "extension" attribute definitions can then be used to calculate the total length of the instruction by using the value of the "type" attribute to examine the operands. gcc/ChangeLog: * config/msp430/msp430-protos.h (msp430x_extendhisi): Return int instead of char *. (msp430_output_asm_shift_insns): Likewise. Add new return_length argument. (msp430x_insn_required): Add prototype. * config/msp430/msp430.c (msp430_output_asm_shift_insns): Return the total length, in bytes, of the emitted instructions. (msp430x_insn_required): New function. (msp430x_extendhisi): Return the total length, in bytes, of the emitted instructions. * config/msp430/msp430.h (ADJUST_INSN_LENGTH): Define. * config/msp430/msp430.md: New define_attr "type". New define_attr "extension". New define_attr "length_multiplier". New define_attr "extra_length". Rewrite define_attr "length". Set type, extension, length, length_multiplier or extra_length insn attributes on all insns, as appropriate. (andneghi3): Rewrite using constraints instead of C code to decide output insns. * config/msp430/predicates.md (msp430_cheap_operand): New predicate. (msp430_high_memory_operand): New predicate.
This commit is contained in:
Jozef Lawrynowicz
parent
f62dd39823
commit
546c8f9558
5 changed files with 504 additions and 119 deletions
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@ -26,7 +26,7 @@ void msp430_expand_eh_return (rtx);
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void msp430_expand_epilogue (int);
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void msp430_expand_helper (rtx *operands, const char *, bool);
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void msp430_expand_prologue (void);
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const char * msp430x_extendhisi (rtx *);
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int msp430x_extendhisi (rtx *, bool);
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void msp430_fixup_compare_operands (machine_mode, rtx *);
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int msp430_hard_regno_nregs_has_padding (int, machine_mode);
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int msp430_hard_regno_nregs_with_padding (int, machine_mode);
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@ -49,10 +49,11 @@ rtx msp430_subreg (machine_mode, rtx, machine_mode, int);
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bool msp430_use_f5_series_hwmult (void);
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bool msp430_has_hwmult (void);
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bool msp430_op_not_in_high_mem (rtx op);
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bool msp430x_insn_required (rtx op);
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#ifdef RTX_CODE
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int msp430_expand_shift (enum rtx_code code, machine_mode mode, rtx *operands);
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const char * msp430_output_asm_shift_insns (enum rtx_code code, machine_mode mode, rtx *operands);
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int msp430_output_asm_shift_insns (enum rtx_code code, machine_mode mode, rtx *operands, bool);
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#endif
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#endif /* GCC_MSP430_PROTOS_H */
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@ -3520,18 +3520,22 @@ msp430_expand_shift (enum rtx_code code, machine_mode mode, rtx *operands)
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For 430X it is inneficient to do so for any modes except SI and DI, since we
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can make use of R*M insns or RPT with 430X insns, so this function is only
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used for SImode in that case. */
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const char *
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int
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msp430_output_asm_shift_insns (enum rtx_code code, machine_mode mode,
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rtx *operands)
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rtx *operands, bool return_length)
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{
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int i;
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int amt;
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int max_shift = GET_MODE_BITSIZE (mode) - 1;
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int length = 0;
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gcc_assert (CONST_INT_P (operands[2]));
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amt = INTVAL (operands[2]);
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if (amt == 0 || amt > max_shift)
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{
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if (return_length)
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return 0;
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switch (code)
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{
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case ASHIFT:
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@ -3549,17 +3553,28 @@ msp430_output_asm_shift_insns (enum rtx_code code, machine_mode mode,
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default:
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gcc_unreachable ();
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}
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return "";
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return 0;
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}
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if (code == ASHIFT)
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{
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if (!msp430x && mode == HImode)
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for (i = 0; i < amt; i++)
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output_asm_insn ("RLA.W\t%0", operands);
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{
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if (return_length)
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length = 2 + (MEM_P (operands[0]) ? 2 : 0);
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else
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for (i = 0; i < amt; i++)
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output_asm_insn ("RLA.W\t%0", operands);
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}
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else if (mode == SImode)
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for (i = 0; i < amt; i++)
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output_asm_insn ("RLA%X0.W\t%L0 { RLC%X0.W\t%H0", operands);
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{
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if (return_length)
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length = 4 + (MEM_P (operands[0]) ? 4 : 0)
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+ (4 * msp430x_insn_required (operands[0]));
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else
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for (i = 0; i < amt; i++)
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output_asm_insn ("RLA%X0.W\t%L0 { RLC%X0.W\t%H0", operands);
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}
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else
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/* Catch unhandled cases. */
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gcc_unreachable ();
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@ -3567,33 +3582,61 @@ msp430_output_asm_shift_insns (enum rtx_code code, machine_mode mode,
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else if (code == ASHIFTRT)
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{
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if (!msp430x && mode == HImode)
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for (i = 0; i < amt; i++)
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output_asm_insn ("RRA.W\t%0", operands);
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{
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if (return_length)
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length = 2 + (MEM_P (operands[0]) ? 2 : 0);
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else
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for (i = 0; i < amt; i++)
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output_asm_insn ("RRA.W\t%0", operands);
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}
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else if (mode == SImode)
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for (i = 0; i < amt; i++)
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output_asm_insn ("RRA%X0.W\t%H0 { RRC%X0.W\t%L0", operands);
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{
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if (return_length)
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length = 4 + (MEM_P (operands[0]) ? 4 : 0)
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+ (4 * msp430x_insn_required (operands[0]));
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else
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for (i = 0; i < amt; i++)
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output_asm_insn ("RRA%X0.W\t%H0 { RRC%X0.W\t%L0", operands);
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}
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else
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gcc_unreachable ();
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}
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else if (code == LSHIFTRT)
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{
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if (!msp430x && mode == HImode)
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for (i = 0; i < amt; i++)
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output_asm_insn ("CLRC { RRC.W\t%0", operands);
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{
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if (return_length)
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length = 4 + (MEM_P (operands[0]) ? 2 : 0);
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else
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for (i = 0; i < amt; i++)
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output_asm_insn ("CLRC { RRC.W\t%0", operands);
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}
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else if (mode == SImode)
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for (i = 0; i < amt; i++)
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output_asm_insn ("CLRC { RRC%X0.W\t%H0 { RRC%X0.W\t%L0", operands);
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{
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if (return_length)
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length = 6 + (MEM_P (operands[0]) ? 4 : 0)
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+ (4 * msp430x_insn_required (operands[0]));
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else
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for (i = 0; i < amt; i++)
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output_asm_insn ("CLRC { RRC%X0.W\t%H0 { RRC%X0.W\t%L0",
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operands);
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}
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/* FIXME: Why doesn't "RRUX.W\t%H0 { RRC%X0.W\t%L0" work for msp430x?
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It causes execution timeouts e.g. pr41963.c. */
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#if 0
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else if (msp430x && mode == SImode)
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for (i = 0; i < amt; i++)
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output_asm_insn ("RRUX.W\t%H0 { RRC%X0.W\t%L0", operands);
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{
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if (return_length)
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length = 2;
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else
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for (i = 0; i < amt; i++)
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output_asm_insn ("RRUX.W\t%H0 { RRC%X0.W\t%L0", operands);
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}
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#endif
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else
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gcc_unreachable ();
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}
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return "";
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return length * amt;
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}
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/* Called by cbranch<mode>4 to coerce operands into usable forms. */
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@ -4115,6 +4158,20 @@ msp430_op_not_in_high_mem (rtx op)
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return false;
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}
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/* Based on the operand OP, is a 430X insn required to handle it?
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There are only 3 conditions for which a 430X insn is required:
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- PSImode operand
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- memory reference to a symbol which could be in upper memory
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(so its address is > 0xFFFF)
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- absolute address which has VOIDmode, i.e. (mem:HI (const_int))
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Use a 430 insn if none of these conditions are true. */
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bool
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msp430x_insn_required (rtx op)
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{
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return (GET_MODE (op) == PSImode
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|| !msp430_op_not_in_high_mem (op));
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}
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#undef TARGET_PRINT_OPERAND
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#define TARGET_PRINT_OPERAND msp430_print_operand
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@ -4455,35 +4512,52 @@ msp430_register_pre_includes (const char *sysroot ATTRIBUTE_UNUSED,
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/* Generate a sequence of instructions to sign-extend an HI
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value into an SI value. Handles the tricky case where
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we are overwriting the destination. */
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const char *
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msp430x_extendhisi (rtx * operands)
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we are overwriting the destination.
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Return the number of bytes used by the emitted instructions.
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If RETURN_LENGTH is true then do not emit the assembly instruction
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sequence. */
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int
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msp430x_extendhisi (rtx * operands, bool return_length)
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{
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if (REGNO (operands[0]) == REGNO (operands[1]))
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/* Low word of dest == source word. 8-byte sequence. */
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return "BIT.W\t#0x8000, %L0 { SUBC.W\t%H0, %H0 { INV.W\t%H0, %H0";
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{
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/* Low word of dest == source word. */
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if (!return_length)
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output_asm_insn ("BIT.W\t#0x8000, %L0 { SUBC.W\t%H0, %H0 { INV.W\t%H0, %H0",
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operands);
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return 8;
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}
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else if (! msp430x)
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{
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/* Note: This sequence is approximately the same length as invoking a
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helper function to perform the sign-extension, as in:
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if (! msp430x)
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/* Note: This sequence is approximately the same length as invoking a helper
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function to perform the sign-extension, as in:
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MOV.W %1, %L0
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MOV.W %1, r12
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CALL __mspabi_srai_15
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MOV.W r12, %H0
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MOV.W %1, %L0
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MOV.W %1, r12
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CALL __mspabi_srai_15
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MOV.W r12, %H0
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but this version does not involve any function calls or using argument
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registers, so it reduces register pressure. */
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if (!return_length)
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output_asm_insn ("MOV.W\t%1, %L0 { BIT.W\t#0x8000, %L0 { SUBC.W\t%H0, %H0 { INV.W\t%H0, %H0",
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operands);
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return 10;
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}
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else if (REGNO (operands[0]) + 1 == REGNO (operands[1]))
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{
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/* High word of dest == source word. */
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if (!return_length)
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output_asm_insn ("MOV.W\t%1, %L0 { RPT\t#15 { RRAX.W\t%H0",
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operands);
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return 6;
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}
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but this version does not involve any function calls or using argument
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registers, so it reduces register pressure. 10-byte sequence. */
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return "MOV.W\t%1, %L0 { BIT.W\t#0x8000, %L0 { SUBC.W\t%H0, %H0 "
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"{ INV.W\t%H0, %H0";
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if (REGNO (operands[0]) + 1 == REGNO (operands[1]))
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/* High word of dest == source word. 6-byte sequence. */
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return "MOV.W\t%1, %L0 { RPT\t#15 { RRAX.W\t%H0";
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/* No overlap between dest and source. 8-byte sequence. */
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return "MOV.W\t%1, %L0 { MOV.W\t%1, %H0 { RPT\t#15 { RRAX.W\t%H0";
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/* No overlap between dest and source. */
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if (!return_length)
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output_asm_insn ("MOV.W\t%1, %L0 { MOV.W\t%1, %H0 { RPT\t#15 { RRAX.W\t%H0",
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operands);
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return 8;
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}
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/* Stop GCC from thinking that it can eliminate (SUBREG:PSI (SI)). */
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@ -530,3 +530,13 @@ void msp430_register_pre_includes (const char *sysroot ATTRIBUTE_UNUSED,
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#define SYMBOL_FLAG_LOW_MEM (SYMBOL_FLAG_MACH_DEP << 0)
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#define ADJUST_INSN_LENGTH(insn, length) \
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do \
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{ \
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if (recog_memoized (insn) >= 0) \
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{ \
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length += get_attr_extra_length (insn); \
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length *= get_attr_length_multiplier (insn); \
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} \
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} while (0)
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File diff suppressed because it is too large
Load diff
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@ -131,3 +131,16 @@
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(define_predicate "msp430_symbol_operand"
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(match_code "symbol_ref")
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)
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; Used in length attribute tests - if a source operand is a reg,
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; (mem (post_inc)), or (mem (reg)) then it is cheap compared to other operand
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; types.
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(define_predicate "msp430_cheap_operand"
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(ior (match_code "reg")
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(and (match_code "mem")
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(ior (match_code "reg" "0")
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(match_code "post_inc" "0")))))
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; Used for insn attributes only. For insn patterns themselves, use constraints.
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(define_predicate "msp430_high_memory_operand"
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(match_test "msp430x_insn_required (op)"))
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