2012-08-23 Julian Brown <julian@codesourcery.com>
Sandra Loosemore <sandra@codesourcery.com> gcc/ * config/mips/mips.md (UNSPEC_CASESI_DISPATCH): New. (MIPS16_T_REGNUM): New constant. (tablejump): Don't use for MIPS16_SHORT_JUMP_TABLES. (casesi): New. (casesi_internal_mips16_<mode>): New. * config/mips/mips.c (mips16_split_long_branches): Adjust test to ignore casesi jump tables. * config/mips/mips.h (TARGET_MIPS16_SHORT_JUMP_TABLES): Update comment. (CASE_VECTOR_MODE): Use SImode unconditionally. (CASE_VECTOR_SHORTEN_MODE): Define. (ASM_OUTPUT_ADDR_DIFF_ELT): Output word-sized addr_diff_elts when necessary for MIPS16_SHORT_JUMP_TABLES. gcc/testsuite/ * gcc.target/mips/code-readable-1.c: Add -O to options. Co-Authored-By: Sandra Loosemore <sandra@codesourcery.com> From-SVN: r190625
This commit is contained in:
Julian Brown
Sandra Loosemore
parent
a147b6d28f
commit
545ca0f278
6 changed files with 136 additions and 14 deletions
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@ -1,3 +1,21 @@
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2012-08-23 Julian Brown <julian@codesourcery.com>
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Sandra Loosemore <sandra@codesourcery.com>
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* config/mips/mips.md
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(UNSPEC_CASESI_DISPATCH): New.
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(MIPS16_T_REGNUM): New constant.
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(tablejump): Don't use for MIPS16_SHORT_JUMP_TABLES.
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(casesi): New.
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(casesi_internal_mips16_<mode>): New.
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* config/mips/mips.c (mips16_split_long_branches): Adjust test
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to ignore casesi jump tables.
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* config/mips/mips.h (TARGET_MIPS16_SHORT_JUMP_TABLES): Update
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comment.
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(CASE_VECTOR_MODE): Use SImode unconditionally.
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(CASE_VECTOR_SHORTEN_MODE): Define.
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(ASM_OUTPUT_ADDR_DIFF_ELT): Output word-sized addr_diff_elts
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when necessary for MIPS16_SHORT_JUMP_TABLES.
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2012-08-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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* config/rs6000/rs6000.c (rs6000_density_test): Free loop body.
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@ -15575,7 +15575,8 @@ mips16_split_long_branches (void)
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for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
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if (JUMP_P (insn)
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&& USEFUL_INSN_P (insn)
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&& get_attr_length (insn) > 8)
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&& get_attr_length (insn) > 8
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&& (any_condjump_p (insn) || any_uncondjump_p (insn)))
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{
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rtx old_label, new_label, temp, saved_temp;
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rtx target, jump, jump_sequence;
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@ -2330,13 +2330,18 @@ typedef struct mips_args {
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/* True if we're generating a form of MIPS16 code in which jump tables
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are stored in the text section and encoded as 16-bit PC-relative
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offsets. This is only possible when general text loads are allowed,
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since the table access itself will be an "lh" instruction. */
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/* ??? 16-bit offsets can overflow in large functions. */
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since the table access itself will be an "lh" instruction. If the
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PC-relative offsets grow too large, 32-bit offsets are used instead. */
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#define TARGET_MIPS16_SHORT_JUMP_TABLES TARGET_MIPS16_TEXT_LOADS
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#define JUMP_TABLES_IN_TEXT_SECTION TARGET_MIPS16_SHORT_JUMP_TABLES
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#define CASE_VECTOR_MODE (TARGET_MIPS16_SHORT_JUMP_TABLES ? HImode : ptr_mode)
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#define CASE_VECTOR_MODE SImode
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/* Only use short offsets if their range will not overflow. */
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#define CASE_VECTOR_SHORTEN_MODE(MIN, MAX, BODY) \
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(TARGET_MIPS16_SHORT_JUMP_TABLES && ((MIN) >= -32768 && (MAX) < 32768) \
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? HImode : SImode)
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#define CASE_VECTOR_PC_RELATIVE TARGET_MIPS16_SHORT_JUMP_TABLES
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@ -2636,8 +2641,14 @@ while (0)
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#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
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do { \
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if (TARGET_MIPS16_SHORT_JUMP_TABLES) \
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fprintf (STREAM, "\t.half\t%sL%d-%sL%d\n", \
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LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \
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{ \
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if (GET_MODE (BODY) == HImode) \
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fprintf (STREAM, "\t.half\t%sL%d-%sL%d\n", \
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LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \
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else \
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fprintf (STREAM, "\t.word\t%sL%d-%sL%d\n", \
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LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \
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} \
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else if (TARGET_GPWORD) \
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fprintf (STREAM, "\t%s\t%sL%d\n", \
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ptr_mode == DImode ? ".gpdword" : ".gpword", \
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@ -134,10 +134,14 @@
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;; Used in a call expression in place of args_size. It's present for PIC
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;; indirect calls where it contains args_size and the function symbol.
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UNSPEC_CALL_ATTR
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;; MIPS16 casesi jump table dispatch.
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UNSPEC_CASESI_DISPATCH
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])
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(define_constants
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[(TLS_GET_TP_REGNUM 3)
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(MIPS16_T_REGNUM 24)
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(PIC_FUNCTION_ADDR_REGNUM 25)
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(RETURN_ADDR_REGNUM 31)
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(CPRESTORE_SLOT_REGNUM 76)
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@ -5904,14 +5908,9 @@
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[(set (pc)
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(match_operand 0 "register_operand"))
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(use (label_ref (match_operand 1 "")))]
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""
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"!TARGET_MIPS16_SHORT_JUMP_TABLES"
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{
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if (TARGET_MIPS16_SHORT_JUMP_TABLES)
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operands[0] = expand_binop (Pmode, add_optab,
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convert_to_mode (Pmode, operands[0], false),
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gen_rtx_LABEL_REF (Pmode, operands[1]),
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0, 0, OPTAB_WIDEN);
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else if (TARGET_GPWORD)
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if (TARGET_GPWORD)
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operands[0] = expand_binop (Pmode, add_optab, operands[0],
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pic_offset_table_rtx, 0, 0, OPTAB_WIDEN);
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else if (TARGET_RTP_PIC)
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@ -5937,6 +5936,94 @@
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[(set_attr "type" "jump")
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(set_attr "mode" "none")])
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;; For MIPS16, we don't know whether a given jump table will use short or
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;; word-sized offsets until late in compilation, when we are able to determine
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;; the sizes of the insns which comprise the containing function. This
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;; necessitates the use of the casesi rather than the tablejump pattern, since
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;; the latter tries to calculate the index of the offset to jump through early
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;; in compilation, i.e. at expand time, when nothing is known about the
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;; eventual function layout.
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(define_expand "casesi"
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[(match_operand:SI 0 "register_operand" "") ; index to jump on
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(match_operand:SI 1 "const_int_operand" "") ; lower bound
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(match_operand:SI 2 "const_int_operand" "") ; total range
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(match_operand 3 "" "") ; table label
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(match_operand 4 "" "")] ; out of range label
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"TARGET_MIPS16_SHORT_JUMP_TABLES"
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{
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if (operands[1] != const0_rtx)
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{
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rtx reg = gen_reg_rtx (SImode);
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rtx offset = gen_int_mode (-INTVAL (operands[1]), SImode);
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if (!arith_operand (offset, SImode))
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offset = force_reg (SImode, offset);
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emit_insn (gen_addsi3 (reg, operands[0], offset));
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operands[0] = reg;
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}
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if (!arith_operand (operands[0], SImode))
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operands[0] = force_reg (SImode, operands[0]);
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operands[2] = GEN_INT (INTVAL (operands[2]) + 1);
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emit_jump_insn (PMODE_INSN (gen_casesi_internal_mips16,
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(operands[0], operands[2],
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operands[3], operands[4])));
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DONE;
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})
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(define_insn "casesi_internal_mips16_<mode>"
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[(set (pc)
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(if_then_else
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(leu (match_operand:SI 0 "register_operand" "d")
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(match_operand:SI 1 "arith_operand" "dI"))
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(unspec:P
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[(match_dup 0)
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(label_ref (match_operand 2 "" ""))]
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UNSPEC_CASESI_DISPATCH)
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(label_ref (match_operand 3 "" ""))))
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(clobber (match_scratch:P 4 "=d"))
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(clobber (match_scratch:P 5 "=d"))
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(clobber (reg:SI MIPS16_T_REGNUM))]
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"TARGET_MIPS16_SHORT_JUMP_TABLES"
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{
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rtx diff_vec = PATTERN (next_real_insn (operands[2]));
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gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
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output_asm_insn ("sltu\t%0, %1", operands);
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output_asm_insn ("bteqz\t%3", operands);
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switch (GET_MODE (diff_vec))
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{
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case HImode:
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output_asm_insn ("sll\t%5, %0, 1", operands);
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output_asm_insn ("la\t%4, %2", operands);
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output_asm_insn ("<d>addu\t%5, %4, %5", operands);
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output_asm_insn ("lh\t%5, 0(%5)", operands);
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break;
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case SImode:
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output_asm_insn ("sll\t%5, %0, 2", operands);
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output_asm_insn ("la\t%4, %2", operands);
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output_asm_insn ("<d>addu\t%5, %4, %5", operands);
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output_asm_insn ("lw\t%5, 0(%5)", operands);
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break;
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default:
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gcc_unreachable ();
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}
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output_asm_insn ("addu\t%4, %4, %5", operands);
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return "j\t%4";
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}
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[(set_attr "length" "32")])
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;; For TARGET_USE_GOT, we save the gp in the jmp_buf as well.
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;; While it is possible to either pull it off the stack (in the
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;; o32 case) or recalculate it given t9 and our target label,
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@ -1,3 +1,8 @@
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2012-08-23 Julian Brown <julian@codesourcery.com>
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Sandra Loosemore <sandra@codesourcery.com>
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* gcc.target/mips/code-readable-1.c: Add -O to options.
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2012-08-23 Paolo Carlini <paolo.carlini@oracle.com>
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PR c++/20420
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@ -1,4 +1,4 @@
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/* { dg-options "(-mips16) -mcode-readable=yes -mgp32 addressing=absolute" } */
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/* { dg-options "(-mips16) -mcode-readable=yes -mgp32 addressing=absolute -O" } */
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MIPS16 int
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foo (int i)
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