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xtensa: Prepare the transition from Reload to LRA

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This patch provides the first step in the transition from Reload to LRA
in Xtensa.

gcc/ChangeLog:

	* config/xtensa/xtensa-protos.h
	(xtensa_split1_finished_p, xtensa_split_DI_reg_imm): New prototypes.
	* config/xtensa/xtensa.cc
	(xtensa_split1_finished_p, xtensa_split_DI_reg_imm, xtensa_lra_p):
	New functions.
	(TARGET_LRA_P): Replace the dummy hook with xtensa_lra_p.
	(xt_true_regnum): Rework.
	* config/xtensa/xtensa.h (CALL_REALLY_USED_REGISTERS):
	Switch from CALL_USED_REGISTERS, and revise the comment.
	* config/xtensa/constraints.md (Y):
	Use !xtensa_split1_finished_p() instead of can_create_pseudo_p().
	* config/xtensa/predicates.md (move_operand): Ditto.
	* config/xtensa/xtensa.md: Add two new split patterns:
	  - splits DImode immediate load into two SImode ones
	  - puts out-of-constraint SImode constants into the constant pool
	* config/xtensa/xtensa.opt (-mlra): New target-specific option
	for testing purpose.
This commit is contained in:
Takayuki 'January June' Suwa 2022-10-19 17:16:24 +09:00 • committed by Max Filippov
parent 95c5cffb71
commit 4f3f0296ac
7 changed files with 99 additions and 24 deletions
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2
gcc/config/xtensa/constraints.md
View file

@ -121,7 +121,7 @@
(ior (and (match_code "const_int,const_double,const,symbol_ref,label_ref")
(match_test "TARGET_AUTO_LITPOOLS"))
(and (match_code "const_int")
(match_test "can_create_pseudo_p ()"))))
(match_test "! xtensa_split1_finished_p ()"))))
;; Memory constraints. Do not use define_memory_constraint here. Doing so
;; causes reload to force some constants into the constant pool, but since

2
gcc/config/xtensa/predicates.md
View file

@ -149,7 +149,7 @@
(ior (and (match_code "const_int")
(match_test "(GET_MODE_CLASS (mode) == MODE_INT
&& xtensa_simm12b (INTVAL (op)))
|| can_create_pseudo_p ()"))
|| ! xtensa_split1_finished_p ()"))
(and (match_code "const_int,const_double,const,symbol_ref,label_ref")
(match_test "(TARGET_CONST16 || TARGET_AUTO_LITPOOLS)
&& CONSTANT_P (op)

2
gcc/config/xtensa/xtensa-protos.h
View file

@ -58,6 +58,8 @@ extern char *xtensa_emit_call (int, rtx *);
extern char *xtensa_emit_sibcall (int, rtx *);
extern bool xtensa_tls_referenced_p (rtx);
extern enum rtx_code xtensa_shlrd_which_direction (rtx, rtx);
extern bool xtensa_split1_finished_p (void);
extern void xtensa_split_DI_reg_imm (rtx *);
#ifdef TREE_CODE
extern void init_cumulative_args (CUMULATIVE_ARGS *, int);

69
gcc/config/xtensa/xtensa.cc
View file

@ -56,6 +56,7 @@ along with GCC; see the file COPYING3. If not see
#include "hw-doloop.h"
#include "rtl-iter.h"
#include "insn-attr.h"
#include "tree-pass.h"
/* This file should be included last. */
#include "target-def.h"
@ -199,6 +200,7 @@ static void xtensa_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
HOST_WIDE_INT delta,
HOST_WIDE_INT vcall_offset,
tree function);
static bool xtensa_lra_p (void);
static rtx xtensa_delegitimize_address (rtx);
@ -295,7 +297,7 @@ static rtx xtensa_delegitimize_address (rtx);
#define TARGET_CANNOT_FORCE_CONST_MEM xtensa_cannot_force_const_mem
#undef TARGET_LRA_P
#define TARGET_LRA_P hook_bool_void_false
#define TARGET_LRA_P xtensa_lra_p
#undef TARGET_LEGITIMATE_ADDRESS_P
#define TARGET_LEGITIMATE_ADDRESS_P xtensa_legitimate_address_p
@ -492,21 +494,30 @@ xtensa_mask_immediate (HOST_WIDE_INT v)
int
xt_true_regnum (rtx x)
{
if (GET_CODE (x) == REG)
if (REG_P (x))
{
if (reg_renumber
&& REGNO (x) >= FIRST_PSEUDO_REGISTER
&& reg_renumber[REGNO (x)] >= 0)
if (! HARD_REGISTER_P (x)
&& reg_renumber
&& (lra_in_progress || reg_renumber[REGNO (x)] >= 0))
return reg_renumber[REGNO (x)];
return REGNO (x);
}
if (GET_CODE (x) == SUBREG)
if (SUBREG_P (x))
{
int base = xt_true_regnum (SUBREG_REG (x));
if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
return base + subreg_regno_offset (REGNO (SUBREG_REG (x)),
GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x), GET_MODE (x));
if (base >= 0
&& HARD_REGISTER_NUM_P (base))
{
struct subreg_info info;
subreg_get_info (lra_in_progress
? (unsigned) base : REGNO (SUBREG_REG (x)),
GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x), GET_MODE (x), &info);
if (info.representable_p)
return base + info.offset;
}
}
return -1;
}
@ -2477,6 +2488,36 @@ xtensa_shlrd_which_direction (rtx op0, rtx op1)
}
/* Return true after "split1" pass has been finished. */
bool
xtensa_split1_finished_p (void)
{
return cfun && (cfun->curr_properties & PROP_rtl_split_insns);
}
/* Split a DImode pair of reg (operand[0]) and const_int (operand[1]) into
two SImode pairs, the low-part (operands[0] and [1]) and the high-part
(operands[2] and [3]). */
void
xtensa_split_DI_reg_imm (rtx *operands)
{
rtx lowpart, highpart;
if (WORDS_BIG_ENDIAN)
split_double (operands[1], &highpart, &lowpart);
else
split_double (operands[1], &lowpart, &highpart);
operands[3] = highpart;
operands[2] = gen_highpart (SImode, operands[0]);
operands[1] = lowpart;
operands[0] = gen_lowpart (SImode, operands[0]);
}
/* Implement TARGET_CANNOT_FORCE_CONST_MEM. */
static bool
@ -5119,4 +5160,12 @@ xtensa_delegitimize_address (rtx op)
return op;
}
/* Implement TARGET_LRA_P. */
static bool
xtensa_lra_p (void)
{
return TARGET_LRA;
}
#include "gt-xtensa.h"

8
gcc/config/xtensa/xtensa.h
View file

@ -229,7 +229,7 @@ along with GCC; see the file COPYING3. If not see
}
/* 1 for registers not available across function calls.
These must include the FIXED_REGISTERS and also any
These need not include the FIXED_REGISTERS but must any
registers that can be used without being saved.
The latter must include the registers where values are returned
and the register where structure-value addresses are passed.
@ -242,10 +242,10 @@ along with GCC; see the file COPYING3. If not see
Proper values are computed in TARGET_CONDITIONAL_REGISTER_USAGE. */
#define CALL_USED_REGISTERS \
#define CALL_REALLY_USED_REGISTERS \
{ \
1, 1, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 2, 2, 2, 2, \
1, 1, 1, \
1, 0, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 2, 2, 2, 2, \
0, 0, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, \
}

36
gcc/config/xtensa/xtensa.md
View file

@ -940,14 +940,9 @@
because of offering further optimization opportunities. */
if (register_operand (operands[0], DImode))
{
rtx lowpart, highpart;
if (TARGET_BIG_ENDIAN)
split_double (operands[1], &highpart, &lowpart);
else
split_double (operands[1], &lowpart, &highpart);
emit_insn (gen_movsi (gen_lowpart (SImode, operands[0]), lowpart));
emit_insn (gen_movsi (gen_highpart (SImode, operands[0]), highpart));
xtensa_split_DI_reg_imm (operands);
emit_move_insn (operands[0], operands[1]);
emit_move_insn (operands[2], operands[3]);
DONE;
}
@ -981,6 +976,19 @@
}
})
(define_split
[(set (match_operand:DI 0 "register_operand")
(match_operand:DI 1 "const_int_operand"))]
"!TARGET_CONST16 && !TARGET_AUTO_LITPOOLS
&& ! xtensa_split1_finished_p ()"
[(set (match_dup 0)
(match_dup 1))
(set (match_dup 2)
(match_dup 3))]
{
xtensa_split_DI_reg_imm (operands);
})
;; 32-bit Integer moves
(define_expand "movsi"
@ -1017,6 +1025,18 @@
(set_attr "mode" "SI")
(set_attr "length" "2,2,2,2,2,2,3,3,3,3,6,3,3,3,3,3")])
(define_split
[(set (match_operand:SI 0 "register_operand")
(match_operand:SI 1 "const_int_operand"))]
"!TARGET_CONST16 && !TARGET_AUTO_LITPOOLS
&& ! xtensa_split1_finished_p ()
&& ! xtensa_simm12b (INTVAL (operands[1]))"
[(set (match_dup 0)
(match_dup 1))]
{
operands[1] = force_const_mem (SImode, operands[1]);
})
(define_split
[(set (match_operand:SI 0 "register_operand")
(match_operand:SI 1 "constantpool_operand"))]

4
gcc/config/xtensa/xtensa.opt
View file

@ -34,6 +34,10 @@ mextra-l32r-costs=
Target RejectNegative Joined UInteger Var(xtensa_extra_l32r_costs) Init(0)
Set extra memory access cost for L32R instruction, in clock-cycle units.
mlra
Target Mask(LRA)
Use LRA instead of reload (transitional).
mtarget-align
Target
Automatically align branch targets to reduce branch penalties.