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constraints.md: Add 'j' constraint.

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gcc/
2008-03-31  Jan Beulich  <jbeulich@novell.com>

	* config/ia64/constraints.md: Add 'j' constraint.
	* config/ia64/ia64.md (movsi_internal): Add addp4 case.
	(movdi_internal): Likewise.

From-SVN: r133748
This commit is contained in:
Jan Beulich 2008-03-31 07:53:48 +00:00 • committed by Jan Beulich
parent 5b6a73c3ec
commit 4e483a224b
3 changed files with 20 additions and 6 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2008-03-31 Jan Beulich <jbeulich@novell.com>
* config/ia64/constraints.md: Add 'j' constraint.
* config/ia64/ia64.md (movsi_internal): Add addp4 case.
(movdi_internal): Likewise.
2008-03-30 Volker Reichelt <v.reichelt@netcologne.de>
PR c/35748

6
gcc/config/ia64/constraints.md
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@ -52,6 +52,12 @@
(and (match_code "const_int")
(match_test "(unsigned HOST_WIDE_INT)ival + 0x200000 < 0x400000")))
(define_constraint "j"
"(2**32-2**13)..(2**32-1) for addp4 instructions"
(and (match_code "const_int")
(match_test "(unsigned HOST_WIDE_INT)ival >= 0xffffe000
&& (unsigned HOST_WIDE_INT)ival <= 0xffffffff")))
(define_constraint "K"
"8 bit signed immediate for logical instructions"
(and (match_code "const_int")

14
gcc/config/ia64/ia64.md
View file

@ -322,12 +322,13 @@
})
(define_insn "*movsi_internal"
[(set (match_operand:SI 0 "destination_operand" "=r,r,r,r, m, r,*f,*f, r,*d")
(match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,*d,rK"))]
[(set (match_operand:SI 0 "destination_operand" "=r,r,r,r,r, m, r,*f,*f, r,*d")
(match_operand:SI 1 "move_operand" "rO,J,j,i,m,rO,*f,rO,*f,*d,rK"))]
"ia64_move_ok (operands[0], operands[1])"
"@
mov %0 = %r1
addl %0 = %1, r0
addp4 %0 = %1 - 0x100000000, r0
movl %0 = %1
ld4%O1 %0 = %1%P1
st4%Q0 %0 = %r1%P0
@ -337,7 +338,7 @@
mov %0 = %1
mov %0 = %r1"
;; frar_m, toar_m ??? why not frar_i and toar_i
[(set_attr "itanium_class" "ialu,ialu,long_i,ld,st,frfr,tofr,fmisc,frar_m,toar_m")])
[(set_attr "itanium_class" "ialu,ialu,ialu,long_i,ld,st,frfr,tofr,fmisc,frar_m,toar_m")])
(define_expand "movdi"
[(set (match_operand:DI 0 "general_operand" "")
@ -352,14 +353,15 @@
(define_insn "*movdi_internal"
[(set (match_operand:DI 0 "destination_operand"
"=r,r,r,r, m, r,*f,*f,*f, Q, r,*b, r,*e, r,*d, r,*c")
"=r,r,r,r,r, m, r,*f,*f,*f, Q, r,*b, r,*e, r,*d, r,*c")
(match_operand:DI 1 "move_operand"
"rO,JT,i,m,rO,*f,rO,*f, Q,*f,*b,rO,*e,rK,*d,rK,*c,rO"))]
"rO,JT,j,i,m,rO,*f,rO,*f, Q,*f,*b,rO,*e,rK,*d,rK,*c,rO"))]
"ia64_move_ok (operands[0], operands[1])"
{
static const char * const alt[] = {
"%,mov %0 = %r1",
"%,addl %0 = %1, r0",
"%,addp4 %0 = %1 - 0x100000000, r0",
"%,movl %0 = %1",
"%,ld8%O1 %0 = %1%P1",
"%,st8%Q0 %0 = %r1%P0",
@ -383,7 +385,7 @@
return alt[which_alternative];
}
[(set_attr "itanium_class" "ialu,ialu,long_i,ld,st,frfr,tofr,fmisc,fld,stf,frbr,tobr,frar_i,toar_i,frar_m,toar_m,frpr,topr")])
[(set_attr "itanium_class" "ialu,ialu,ialu,long_i,ld,st,frfr,tofr,fmisc,fld,stf,frbr,tobr,frar_i,toar_i,frar_m,toar_m,frpr,topr")])
(define_mode_iterator MODE [BI QI HI SI DI SF DF XF TI])
(define_mode_iterator MODE_FOR_EXTEND [QI HI SI])