From 4cd9ca92cf8cb9d691a5dbe04de114fc9ab817fc Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 7 Jan 2016 12:43:06 +0000 Subject: [PATCH] Add round_nimm_scalar_predicate and use xBm Add round_nimm_scalar_predicate for scalar SSE integer to floating point conversions since round_nimm_predicate is for vector operand. round_constraint can't be used on vector SSE patterns since it is mapped to "vm". The "xBm" constraint must be used in this case. gcc/ PR target/69171 * config/i386/sse.md (_sqrt2): Use the "xBm" constraint. (float2): Use round_nimm_scalar_predicate. (sse_cvtsi2ssq): Likewise. (sse_cvtss2si): Likewise. (sse_cvtss2siq): Likewise. (sse2_cvtsi2sdq): Likewise. (sse2_cvtsd2si): Likewise. (sse2_cvtsd2siq): Likewise. * config/i386/subst.md (round_nimm_scalar_predicate): New predicate. gcc/testsuite/ PR target/69171 * gcc.target/i386/pr69171-1.c: New test. * gcc.target/i386/pr69171-2.c: Likewise. * gcc.target/i386/pr69171-3.c: Likewise. * gcc.target/i386/pr69171-4.c: Likewise. * gcc.target/i386/pr69171-5.c: Likewise. * gcc.target/i386/pr69171-6.c: Likewise. From-SVN: r232126 --- gcc/ChangeLog | 17 +++++++++++ gcc/config/i386/sse.md | 36 +++++++++++++---------- gcc/config/i386/subst.md | 1 + gcc/testsuite/ChangeLog | 10 +++++++ gcc/testsuite/gcc.target/i386/pr69171-1.c | 13 ++++++++ gcc/testsuite/gcc.target/i386/pr69171-2.c | 13 ++++++++ gcc/testsuite/gcc.target/i386/pr69171-3.c | 12 ++++++++ gcc/testsuite/gcc.target/i386/pr69171-4.c | 12 ++++++++ gcc/testsuite/gcc.target/i386/pr69171-5.c | 12 ++++++++ gcc/testsuite/gcc.target/i386/pr69171-6.c | 12 ++++++++ 10 files changed, 123 insertions(+), 15 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr69171-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr69171-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr69171-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr69171-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr69171-5.c create mode 100644 gcc/testsuite/gcc.target/i386/pr69171-6.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 21a95fd1ca4..619bae65a85 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +2016-01-07 H.J. Lu + + PR target/69171 + * config/i386/sse.md (_sqrt2): + Use the "xBm" constraint. + (float2): Use round_nimm_scalar_predicate. + (sse_cvtsi2ssq): Likewise. + (sse_cvtss2si): Likewise. + (sse_cvtss2siq): Likewise. + (sse2_cvtsi2sdq): Likewise. + (sse2_cvtsd2si): Likewise. + (sse2_cvtsd2siq): Likewise. + * config/i386/subst.md (round_nimm_scalar_predicate): New + predicate. + 2015-12-15 Bernd Schmidt PR middle-end/67639 diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index c21cc0e7c67..278dd383295 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1862,11 +1862,14 @@ }) (define_insn "_sqrt2" - [(set (match_operand:VF 0 "register_operand" "=v") - (sqrt:VF (match_operand:VF 1 "" "")))] + [(set (match_operand:VF 0 "register_operand" "=x,v") + (sqrt:VF (match_operand:VF 1 "" "xBm,")))] "TARGET_SSE && && " - "%vsqrt\t{%1, %0|%0, %1}" - [(set_attr "type" "sse") + "@ + sqrt\t{%1, %0|%0, %1} + vsqrt\t{%1, %0|%0, %1}" + [(set_attr "isa" "noavx,avx") + (set_attr "type" "sse") (set_attr "atom_sse_attr" "sqrt") (set_attr "btver2_sse_attr" "sqrt") (set_attr "prefix" "maybe_vex") @@ -4269,7 +4272,7 @@ [(set (match_operand:V4SF 0 "register_operand" "=x,x,v") (vec_merge:V4SF (vec_duplicate:V4SF - (float:SF (match_operand:SI 2 "" "r,m,"))) + (float:SF (match_operand:SI 2 "" "r,m,"))) (match_operand:V4SF 1 "register_operand" "0,0,v") (const_int 1)))] "TARGET_SSE" @@ -4291,7 +4294,7 @@ [(set (match_operand:V4SF 0 "register_operand" "=x,x,v") (vec_merge:V4SF (vec_duplicate:V4SF - (float:SF (match_operand:DI 2 "" "r,m,"))) + (float:SF (match_operand:DI 2 "" "r,m,"))) (match_operand:V4SF 1 "register_operand" "0,0,v") (const_int 1)))] "TARGET_SSE && TARGET_64BIT" @@ -4314,7 +4317,7 @@ [(set (match_operand:SI 0 "register_operand" "=r,r") (unspec:SI [(vec_select:SF - (match_operand:V4SF 1 "" "v,") + (match_operand:V4SF 1 "" "v,") (parallel [(const_int 0)]))] UNSPEC_FIX_NOTRUNC))] "TARGET_SSE" @@ -4344,7 +4347,7 @@ [(set (match_operand:DI 0 "register_operand" "=r,r") (unspec:DI [(vec_select:SF - (match_operand:V4SF 1 "" "v,") + (match_operand:V4SF 1 "" "v,") (parallel [(const_int 0)]))] UNSPEC_FIX_NOTRUNC))] "TARGET_SSE && TARGET_64BIT" @@ -4431,12 +4434,15 @@ (set_attr "mode" "")]) (define_insn "float2" - [(set (match_operand:VF1 0 "register_operand" "=v") + [(set (match_operand:VF1 0 "register_operand" "=x,v") (float:VF1 - (match_operand: 1 "" "")))] + (match_operand: 1 "" "xBm,")))] "TARGET_SSE2 && && " - "%vcvtdq2ps\t{%1, %0|%0, %1}" - [(set_attr "type" "ssecvt") + "@ + cvtdq2ps\t{%1, %0|%0, %1} + vcvtdq2ps\t{%1, %0|%0, %1}" + [(set_attr "isa" "noavx,avx") + (set_attr "type" "ssecvt") (set_attr "prefix" "maybe_vex") (set_attr "mode" "")]) @@ -4684,7 +4690,7 @@ [(set (match_operand:V2DF 0 "register_operand" "=x,x,v") (vec_merge:V2DF (vec_duplicate:V2DF - (float:DF (match_operand:DI 2 "" "r,m,"))) + (float:DF (match_operand:DI 2 "" "r,m,"))) (match_operand:V2DF 1 "register_operand" "0,0,v") (const_int 1)))] "TARGET_SSE2 && TARGET_64BIT" @@ -4806,7 +4812,7 @@ [(set (match_operand:SI 0 "register_operand" "=r,r") (unspec:SI [(vec_select:DF - (match_operand:V2DF 1 "" "v,") + (match_operand:V2DF 1 "" "v,") (parallel [(const_int 0)]))] UNSPEC_FIX_NOTRUNC))] "TARGET_SSE2" @@ -4837,7 +4843,7 @@ [(set (match_operand:DI 0 "register_operand" "=r,r") (unspec:DI [(vec_select:DF - (match_operand:V2DF 1 "" "v,") + (match_operand:V2DF 1 "" "v,") (parallel [(const_int 0)]))] UNSPEC_FIX_NOTRUNC))] "TARGET_SSE2 && TARGET_64BIT" diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md index d35f34ca57c..e2f67c4a00c 100644 --- a/gcc/config/i386/subst.md +++ b/gcc/config/i386/subst.md @@ -124,6 +124,7 @@ (define_subst_attr "round_constraint2" "round" "m" "v") (define_subst_attr "round_constraint3" "round" "rm" "r") (define_subst_attr "round_nimm_predicate" "round" "vector_operand" "register_operand") +(define_subst_attr "round_nimm_scalar_predicate" "round" "nonimmediate_operand" "register_operand") (define_subst_attr "round_prefix" "round" "vex" "evex") (define_subst_attr "round_mode512bit_condition" "round" "1" "(mode == V16SFmode || mode == V8DFmode diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 29894213bcc..53c19946899 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2016-01-07 H.J. Lu + + PR target/69171 + * gcc.target/i386/pr69171-1.c: New test. + * gcc.target/i386/pr69171-2.c: Likewise. + * gcc.target/i386/pr69171-3.c: Likewise. + * gcc.target/i386/pr69171-4.c: Likewise. + * gcc.target/i386/pr69171-5.c: Likewise. + * gcc.target/i386/pr69171-6.c: Likewise. + 2015-12-15 Bernd Schmidt PR middle-end/67639 diff --git a/gcc/testsuite/gcc.target/i386/pr69171-1.c b/gcc/testsuite/gcc.target/i386/pr69171-1.c new file mode 100644 index 00000000000..0b92c22b61f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69171-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -mno-avx -mfpmath=sse" } */ + +#pragma pack(2) +struct { + int n; +} a; +extern void fn2 (float); +void +fn1 () +{ + fn2 (a.n); +} diff --git a/gcc/testsuite/gcc.target/i386/pr69171-2.c b/gcc/testsuite/gcc.target/i386/pr69171-2.c new file mode 100644 index 00000000000..80e1a097f20 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69171-2.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -mno-avx -mfpmath=sse" } */ + +#pragma pack(2) +struct { + long long int n; +} a; +extern void fn2 (float); +void +fn1 () +{ + fn2 (a.n); +} diff --git a/gcc/testsuite/gcc.target/i386/pr69171-3.c b/gcc/testsuite/gcc.target/i386/pr69171-3.c new file mode 100644 index 00000000000..73717bef6ba --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69171-3.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target fpic } } */ +/* { dg-options "-fpic -O2 -msse2 -mno-avx -mfpmath=sse" } */ + +__extension__ typedef __UINTPTR_TYPE__ uintptr_t; + +extern int glob1; + +double +foo (void) +{ + return (double) (int) (uintptr_t) &glob1; +} diff --git a/gcc/testsuite/gcc.target/i386/pr69171-4.c b/gcc/testsuite/gcc.target/i386/pr69171-4.c new file mode 100644 index 00000000000..e4acf3fd5f8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69171-4.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target fpic } } */ +/* { dg-options "-fpic -O2 -msse2 -mno-avx -mfpmath=sse" } */ + +__extension__ typedef __UINTPTR_TYPE__ uintptr_t; + +extern int glob1; + +float +foo (void) +{ + return (float) (int) (uintptr_t) &glob1; +} diff --git a/gcc/testsuite/gcc.target/i386/pr69171-5.c b/gcc/testsuite/gcc.target/i386/pr69171-5.c new file mode 100644 index 00000000000..230af3ec3d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69171-5.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target fpic } } */ +/* { dg-options "-fpic -O2 -msse2 -mno-avx -mfpmath=sse" } */ + +__extension__ typedef __UINTPTR_TYPE__ uintptr_t; + +extern int glob1; + +float +foo (void) +{ + return (float) (long long) (uintptr_t) &glob1; +} diff --git a/gcc/testsuite/gcc.target/i386/pr69171-6.c b/gcc/testsuite/gcc.target/i386/pr69171-6.c new file mode 100644 index 00000000000..b82627a4419 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr69171-6.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target fpic } } */ +/* { dg-options "-fpic -O2 -msse2 -mno-avx -mfpmath=sse" } */ + +__extension__ typedef __UINTPTR_TYPE__ uintptr_t; + +extern int glob1; + +double +foo (void) +{ + return (double) (long long) (uintptr_t) &glob1; +}