From 4c6f9770100ef079f2ce2743b320f6705b03dd4f Mon Sep 17 00:00:00 2001 From: Adam Nemet Date: Tue, 7 Oct 2008 00:30:00 +0000 Subject: [PATCH] mips.md (mulsi3_mul3, [...]): Merge these ... * config/mips/mips.md (mulsi3_mul3, muldi3_mul3): Merge these ... (mul3_mul3): ... into this new template. testsuite/ * gcc.target/mips/mips.exp (dg-mips-options): Set mips_new_gp to 32 when -march=r3900 is passed. * testsuite/gcc.target/mips/r3900-mult.c: New test. From-SVN: r140922 --- gcc/ChangeLog | 5 ++++ gcc/config/mips/mips.md | 34 +++++++--------------- gcc/testsuite/ChangeLog | 6 ++++ gcc/testsuite/gcc.target/mips/mips.exp | 1 + gcc/testsuite/gcc.target/mips/r3900-mult.c | 9 ++++++ 5 files changed, 31 insertions(+), 24 deletions(-) create mode 100644 gcc/testsuite/gcc.target/mips/r3900-mult.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e7b2b502380..e766799ad5b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2008-10-06 Adam Nemet + + * config/mips/mips.md (mulsi3_mul3, muldi3_mul3): Merge these ... + (mul3_mul3): ... into this new template. + 2008-10-06 Aldy Hernandez * gimplify.c (gimplify_arg): Add location argument. Use it. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 6ae6c0bb78f..3f56feb2ee9 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -1367,35 +1367,21 @@ DONE; }) -(define_insn "mulsi3_mul3" - [(set (match_operand:SI 0 "register_operand" "=d,l") - (mult:SI (match_operand:SI 1 "register_operand" "d,d") - (match_operand:SI 2 "register_operand" "d,d"))) - (clobber (match_scratch:SI 3 "=l,X"))] - "ISA_HAS_MUL3" +(define_insn "mul3_mul3" + [(set (match_operand:GPR 0 "register_operand" "=d,l") + (mult:GPR (match_operand:GPR 1 "register_operand" "d,d") + (match_operand:GPR 2 "register_operand" "d,d"))) + (clobber (match_scratch:GPR 3 "=l,X"))] + "ISA_HAS_MUL3" { if (which_alternative == 1) - return "mult\t%1,%2"; - if (TARGET_MIPS3900) + return "mult\t%1,%2"; + if (mode == SImode && TARGET_MIPS3900) return "mult\t%0,%1,%2"; - return "mul\t%0,%1,%2"; + return "mul\t%0,%1,%2"; } [(set_attr "type" "imul3,imul") - (set_attr "mode" "SI")]) - -(define_insn "muldi3_mul3" - [(set (match_operand:DI 0 "register_operand" "=d,l") - (mult:DI (match_operand:DI 1 "register_operand" "d,d") - (match_operand:DI 2 "register_operand" "d,d"))) - (clobber (match_scratch:DI 3 "=l,X"))] - "ISA_HAS_DMUL3" -{ - if (which_alternative == 1) - return "dmult\t%1,%2"; - return "dmul\t%0,%1,%2"; -} - [(set_attr "type" "imul3,imul") - (set_attr "mode" "DI")]) + (set_attr "mode" "")]) ;; If a register gets allocated to LO, and we spill to memory, the reload ;; will include a move from LO to a GPR. Merge it into the multiplication diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0391f3deff6..d9f4f297826 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2008-10-06 Adam Nemet + + * gcc.target/mips/mips.exp (dg-mips-options): Set mips_new_gp to + 32 when -march=r3900 is passed. + * testsuite/gcc.target/mips/r3900-mult.c: New test. + 2008-10-06 Aldy Hernandez * gcc.dg/gomp/for-1.c: Test column. diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp index 832633900c9..8e66e0a1901 100644 --- a/gcc/testsuite/gcc.target/mips/mips.exp +++ b/gcc/testsuite/gcc.target/mips/mips.exp @@ -261,6 +261,7 @@ proc dg-mips-options {args} { -mips[12] - -mips32* - -march=mips32* - + -march=r3900 - -march=24k* - -mabi=32 - -mgp32 { diff --git a/gcc/testsuite/gcc.target/mips/r3900-mult.c b/gcc/testsuite/gcc.target/mips/r3900-mult.c new file mode 100644 index 00000000000..393f1086e07 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/r3900-mult.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-march=r3900" } */ +/* { dg-final { scan-assembler "\tmult\t\[^\n\]*,\[^\n\]*," } } */ + +NOMIPS16 int +f (int a, int b) +{ + return a * b; +}