re PR tree-optimization/78821 (GCC7: Copying whole 32 bits structure field by field not optimised into copying whole 32 bits at once)
PR tree-optimization/78821 * gimple-ssa-store-merging.c (find_bswap_or_nop_load): Give up if base is TARGET_MEM_REF. If base is not MEM_REF, set base_addr to the address of the base rather than the base itself. (find_bswap_or_nop_1): Just use pointer comparison for vuse check. (find_bswap_or_nop_finalize): New function. (find_bswap_or_nop): Use it. (bswap_replace): Return a tree rather than bool, change first argument from gimple * to gimple_stmt_iterator, allow inserting into an empty sequence, allow ins_stmt to be NULL - then emit all stmts into gsi. Fix up MEM_REF address gimplification. (pass_optimize_bswap::execute): Adjust bswap_replace caller. (struct store_immediate_info): Add N and INS_STMT non-static data members. (store_immediate_info::store_immediate_info): Initialize them from newly added ctor args. (merged_store_group::apply_stores): Formatting fixes. Sort by bitpos at the end. (stmts_may_clobber_ref_p): For stores call also refs_anti_dependent_p. (gather_bswap_load_refs): New function. (imm_store_chain_info::try_coalesce_bswap): New method. (imm_store_chain_info::coalesce_immediate_stores): Use it. (split_group): Handle LROTATE_EXPR and NOP_EXPR rhs_code specially. (imm_store_chain_info::output_merged_store): Fail if number of new estimated stmts is bigger or equal than old. Handle LROTATE_EXPR and NOP_EXPR rhs_code. (pass_store_merging::process_store): Compute n and ins_stmt, if ins_stmt is non-NULL and the store rhs is otherwise invalid, use LROTATE_EXPR rhs_code. Pass n and ins_stmt to store_immediate_info ctor. (pass_store_merging::execute): Calculate dominators. * gcc.dg/store_merging_16.c: New test. From-SVN: r254948
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
dffec8ebdb
commit
4b84d9b8f9
4 changed files with 812 additions and 117 deletions
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@ -1,5 +1,38 @@
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2017-11-20 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/78821
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* gimple-ssa-store-merging.c (find_bswap_or_nop_load): Give up
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if base is TARGET_MEM_REF. If base is not MEM_REF, set base_addr
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to the address of the base rather than the base itself.
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(find_bswap_or_nop_1): Just use pointer comparison for vuse check.
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(find_bswap_or_nop_finalize): New function.
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(find_bswap_or_nop): Use it.
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(bswap_replace): Return a tree rather than bool, change first
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argument from gimple * to gimple_stmt_iterator, allow inserting
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into an empty sequence, allow ins_stmt to be NULL - then emit
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all stmts into gsi. Fix up MEM_REF address gimplification.
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(pass_optimize_bswap::execute): Adjust bswap_replace caller.
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(struct store_immediate_info): Add N and INS_STMT non-static
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data members.
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(store_immediate_info::store_immediate_info): Initialize them
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from newly added ctor args.
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(merged_store_group::apply_stores): Formatting fixes. Sort by
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bitpos at the end.
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(stmts_may_clobber_ref_p): For stores call also
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refs_anti_dependent_p.
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(gather_bswap_load_refs): New function.
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(imm_store_chain_info::try_coalesce_bswap): New method.
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(imm_store_chain_info::coalesce_immediate_stores): Use it.
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(split_group): Handle LROTATE_EXPR and NOP_EXPR rhs_code specially.
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(imm_store_chain_info::output_merged_store): Fail if number of
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new estimated stmts is bigger or equal than old. Handle LROTATE_EXPR
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and NOP_EXPR rhs_code.
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(pass_store_merging::process_store): Compute n and ins_stmt, if
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ins_stmt is non-NULL and the store rhs is otherwise invalid, use
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LROTATE_EXPR rhs_code. Pass n and ins_stmt to store_immediate_info
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ctor.
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(pass_store_merging::execute): Calculate dominators.
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* tree-ssa-math-opts.c (nop_stats, bswap_stats, struct symbolic_number,
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BITS_PER_MARKER, MARKER_MASK, MARKER_BYTE_UNKNOWN, HEAD_MARKER, CMPNOP,
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CMPXCHG, do_shift_rotate, verify_symbolic_number_p,
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File diff suppressed because it is too large
Load diff
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@ -1,3 +1,8 @@
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2017-11-20 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/78821
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* gcc.dg/store_merging_16.c: New test.
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2017-11-19 Jan Hubicka <hubicka@ucw.cz>
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PR target/82281
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157
gcc/testsuite/gcc.dg/store_merging_16.c
Normal file
157
gcc/testsuite/gcc.dg/store_merging_16.c
Normal file
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@ -0,0 +1,157 @@
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/* Only test on some 64-bit targets which do have bswap{si,di}2 patterns and
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are either big or little endian (not pdp endian). */
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/* { dg-do compile { target { lp64 && { i?86-*-* x86_64-*-* powerpc*-*-* aarch64*-*-* } } } } */
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/* { dg-require-effective-target store_merge } */
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/* { dg-options "-O2 -fdump-tree-store-merging" } */
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__attribute__((noipa)) void
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f1 (unsigned char *p, unsigned long long q)
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{
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p[0] = q;
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p[1] = q >> 8;
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p[2] = q >> 16;
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p[3] = q >> 24;
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p[4] = q >> 32;
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p[5] = q >> 40;
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p[6] = q >> 48;
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p[7] = q >> 56;
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}
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__attribute__((noipa)) void
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f2 (unsigned char *p, unsigned long long q)
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{
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p[0] = q >> 56;
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p[1] = q >> 48;
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p[2] = q >> 40;
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p[3] = q >> 32;
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p[4] = q >> 24;
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p[5] = q >> 16;
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p[6] = q >> 8;
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p[7] = q;
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}
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__attribute__((noipa)) void
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f3 (unsigned char *__restrict p, unsigned char *__restrict q)
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{
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unsigned char q3 = q[3];
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unsigned char q2 = q[2];
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unsigned char q1 = q[1];
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unsigned char q0 = q[0];
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p[0] = q3;
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p[1] = q2;
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p[2] = q1;
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p[3] = q0;
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}
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__attribute__((noipa)) void
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f4 (unsigned char *__restrict p, unsigned char *__restrict q)
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{
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p[0] = q[3];
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p[1] = q[2];
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p[2] = q[1];
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p[3] = q[0];
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}
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struct S { unsigned char a, b; unsigned short c; };
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__attribute__((noipa)) void
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f5 (struct S *__restrict p, struct S *__restrict q)
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{
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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unsigned char pa = q->c >> 8;
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unsigned char pb = q->c;
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unsigned short pc = (q->a << 8) | q->b;
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#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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unsigned char pa = q->c;
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unsigned char pb = q->c >> 8;
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unsigned short pc = q->a | (q->b << 8);
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#endif
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p->a = pa;
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p->b = pb;
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p->c = pc;
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}
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__attribute__((noipa)) void
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f6 (struct S *__restrict p, struct S *__restrict q)
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{
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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p->a = q->c >> 8;
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p->b = q->c;
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p->c = (q->a << 8) | q->b;
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#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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p->a = q->c;
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p->b = q->c >> 8;
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p->c = q->a | (q->b << 8);
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#endif
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}
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struct T { unsigned long long a : 8, b : 8, c : 8, d : 8, e : 8, f : 8, g : 8, h : 8; };
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__attribute__((noipa)) void
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f7 (struct T *__restrict p, struct T *__restrict q)
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{
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p->a = q->h;
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p->b = q->g;
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p->c = q->f;
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p->d = q->e;
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p->e = q->d;
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p->f = q->c;
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p->g = q->b;
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p->h = q->a;
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}
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struct S b = { 0x11, 0x12,
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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0x1413
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#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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0x1314
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#endif
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};
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struct T e = { 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28 };
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int
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main ()
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{
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unsigned char a[8];
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int i;
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struct S b, c, d;
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f1 (a, 0x0102030405060708ULL);
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for (i = 0; i < 8; ++i)
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if (a[i] != 8 - i)
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__builtin_abort ();
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f2 (a, 0x0102030405060708ULL);
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for (i = 0; i < 8; ++i)
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if (a[i] != 1 + i)
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__builtin_abort ();
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f3 (a, a + 4);
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for (i = 0; i < 8; ++i)
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if (a[i] != (i < 4 ? 8 - i : 1 + i))
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__builtin_abort ();
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f2 (a, 0x090a0b0c0d0e0f10ULL);
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f4 (a + 4, a);
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for (i = 0; i < 8; ++i)
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if (a[i] != (i < 4 ? 9 + i : 16 - i))
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__builtin_abort ();
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f5 (&c, &b);
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if (c.a != 0x14 || c.b != 0x13
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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|| c.c != 0x1112
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#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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|| c.c != 0x1211
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#endif
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)
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__builtin_abort ();
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f6 (&d, &c);
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if (d.a != 0x11 || d.b != 0x12 || d.c != b.c)
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__builtin_abort ();
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struct T f;
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f7 (&f, &e);
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if (f.a != 0x28 || f.b != 0x27 || f.c != 0x26 || f.d != 0x25
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|| f.e != 0x24 || f.f != 0x23 || f.g != 0x22 || f.h != 0x21)
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__builtin_abort ();
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return 0;
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}
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/* { dg-final { scan-tree-dump-times "Merging successful" 7 "store-merging" } } */
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/* { dg-final { scan-tree-dump-times "__builtin_bswap64" 2 "store-merging" } } */
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/* { dg-final { scan-tree-dump-times "__builtin_bswap32" 4 "store-merging" } } */
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