re PR target/70927 ([6 only] avx512dq instructions emitted even with -mavx512vl -mno-avx512dq)
PR target/70927 * config/i386/sse.md (<sse>_andnot<mode>3<mask_name>), *<code><mode>3<mask_name>): For !TARGET_AVX512DQ and EVEX encoding, use vp*[dq] instead of v*p[sd] instructions and adjust mode attribute accordingly. * gcc.target/i386/avx512vl-logic-1.c: New test. * gcc.target/i386/avx512vl-logic-2.c: New test. * gcc.target/i386/avx512dq-logic-2.c: New test. From-SVN: r236083
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
9b5ee426fc
commit
4b59d19ffd
6 changed files with 598 additions and 39 deletions
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@ -1,3 +1,11 @@
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2016-05-10 Jakub Jelinek <jakub@redhat.com>
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PR target/70927
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* config/i386/sse.md (<sse>_andnot<mode>3<mask_name>),
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*<code><mode>3<mask_name>): For !TARGET_AVX512DQ and EVEX encoding,
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use vp*[dq] instead of v*p[sd] instructions and adjust mode attribute
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accordingly.
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2016-05-10 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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PR target/70963
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@ -2783,54 +2783,61 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(define_insn "<sse>_andnot<mode>3<mask_name>"
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[(set (match_operand:VF_128_256 0 "register_operand" "=x,v")
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[(set (match_operand:VF_128_256 0 "register_operand" "=x,x,v,v")
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(and:VF_128_256
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(not:VF_128_256
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(match_operand:VF_128_256 1 "register_operand" "0,v"))
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(match_operand:VF_128_256 2 "vector_operand" "xBm,vm")))]
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(match_operand:VF_128_256 1 "register_operand" "0,x,v,v"))
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(match_operand:VF_128_256 2 "vector_operand" "xBm,xm,vm,vm")))]
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"TARGET_SSE && <mask_avx512vl_condition>"
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{
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static char buf[128];
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const char *ops;
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const char *suffix;
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switch (get_attr_mode (insn))
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{
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case MODE_V8SF:
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case MODE_V4SF:
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suffix = "ps";
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break;
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default:
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suffix = "<ssemodesuffix>";
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}
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switch (which_alternative)
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{
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case 0:
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ops = "andn%s\t{%%2, %%0|%%0, %%2}";
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break;
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case 1:
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case 2:
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case 3:
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ops = "vandn%s\t{%%2, %%1, %%0<mask_operand3_1>|%%0<mask_operand3_1>, %%1, %%2}";
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break;
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default:
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gcc_unreachable ();
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}
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/* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */
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if (<mask_applied> && !TARGET_AVX512DQ)
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switch (get_attr_mode (insn))
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{
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case MODE_V8SF:
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case MODE_V4SF:
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suffix = "ps";
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break;
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case MODE_OI:
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case MODE_TI:
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/* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */
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suffix = GET_MODE_INNER (<MODE>mode) == DFmode ? "q" : "d";
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ops = "vpandn%s\t{%%2, %%1, %%0<mask_operand3_1>|%%0<mask_operand3_1>, %%1, %%2}";
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break;
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default:
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suffix = "<ssemodesuffix>";
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}
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snprintf (buf, sizeof (buf), ops, suffix);
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return buf;
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}
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[(set_attr "isa" "noavx,avx")
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[(set_attr "isa" "noavx,avx,avx512dq,avx512f")
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(set_attr "type" "sselog")
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(set_attr "prefix" "orig,maybe_evex")
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(set_attr "prefix" "orig,maybe_vex,evex,evex")
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(set (attr "mode")
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(cond [(and (match_test "<MODE_SIZE> == 16")
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(cond [(and (match_test "<mask_applied>")
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(and (eq_attr "alternative" "1")
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(match_test "!TARGET_AVX512DQ")))
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(const_string "<sseintvecmode2>")
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(eq_attr "alternative" "3")
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(const_string "<sseintvecmode2>")
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(and (match_test "<MODE_SIZE> == 16")
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(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
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(const_string "<ssePSmode>")
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(match_test "TARGET_AVX")
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@ -2870,7 +2877,10 @@
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}
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[(set_attr "type" "sselog")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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(set (attr "mode")
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(if_then_else (match_test "TARGET_AVX512DQ")
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(const_string "<sseinsnmode>")
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(const_string "XI")))])
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(define_expand "<code><mode>3<mask_name>"
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[(set (match_operand:VF_128_256 0 "register_operand")
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@ -2889,10 +2899,10 @@
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"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
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(define_insn "*<code><mode>3<mask_name>"
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[(set (match_operand:VF_128_256 0 "register_operand" "=x,v")
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[(set (match_operand:VF_128_256 0 "register_operand" "=x,x,v,v")
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(any_logic:VF_128_256
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(match_operand:VF_128_256 1 "vector_operand" "%0,v")
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(match_operand:VF_128_256 2 "vector_operand" "xBm,vm")))]
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(match_operand:VF_128_256 1 "vector_operand" "%0,x,v,v")
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(match_operand:VF_128_256 2 "vector_operand" "xBm,xm,vm,vm")))]
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"TARGET_SSE && <mask_avx512vl_condition>
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&& ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
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{
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@ -2900,43 +2910,50 @@
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const char *ops;
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const char *suffix;
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switch (get_attr_mode (insn))
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{
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case MODE_V8SF:
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case MODE_V4SF:
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suffix = "ps";
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break;
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default:
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suffix = "<ssemodesuffix>";
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}
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switch (which_alternative)
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{
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case 0:
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ops = "<logic>%s\t{%%2, %%0|%%0, %%2}";
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break;
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case 1:
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case 2:
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case 3:
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ops = "v<logic>%s\t{%%2, %%1, %%0<mask_operand3_1>|%%0<mask_operand3_1>, %%1, %%2}";
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break;
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default:
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gcc_unreachable ();
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}
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/* There is no v<logic>p[sd] in avx512f. Use vp<logic>[dq]. */
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if (<mask_applied> && !TARGET_AVX512DQ)
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switch (get_attr_mode (insn))
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{
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case MODE_V8SF:
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case MODE_V4SF:
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suffix = "ps";
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break;
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case MODE_OI:
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case MODE_TI:
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/* There is no v<logic>p[sd] in avx512f. Use vp<logic>[qd]. */
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suffix = GET_MODE_INNER (<MODE>mode) == DFmode ? "q" : "d";
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ops = "vp<logic>%s\t{%%2, %%1, %%0<mask_operand3_1>|%%0<mask_operand3_1>, %%1, %%2}";
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break;
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default:
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suffix = "<ssemodesuffix>";
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}
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snprintf (buf, sizeof (buf), ops, suffix);
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return buf;
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}
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[(set_attr "isa" "noavx,avx")
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[(set_attr "isa" "noavx,avx,avx512dq,avx512f")
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(set_attr "type" "sselog")
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(set_attr "prefix" "orig,maybe_evex")
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(set_attr "prefix" "orig,maybe_evex,evex,evex")
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(set (attr "mode")
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(cond [(and (match_test "<MODE_SIZE> == 16")
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(cond [(and (match_test "<mask_applied>")
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(and (eq_attr "alternative" "1")
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(match_test "!TARGET_AVX512DQ")))
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(const_string "<sseintvecmode2>")
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(eq_attr "alternative" "3")
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(const_string "<sseintvecmode2>")
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(and (match_test "<MODE_SIZE> == 16")
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(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
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(const_string "<ssePSmode>")
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(match_test "TARGET_AVX")
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@ -2961,7 +2978,7 @@
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ops = "";
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/* There is no v<logic>p[sd] in avx512f. Use vp<logic>[dq]. */
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if ((<MODE_SIZE> == 64 || <mask_applied>) && !TARGET_AVX512DQ)
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if (!TARGET_AVX512DQ)
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{
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suffix = GET_MODE_INNER (<MODE>mode) == DFmode ? "q" : "d";
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ops = "p";
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@ -2974,7 +2991,10 @@
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}
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[(set_attr "type" "sselog")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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(set (attr "mode")
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(if_then_else (match_test "TARGET_AVX512DQ")
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(const_string "<sseinsnmode>")
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(const_string "XI")))])
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(define_expand "copysign<mode>3"
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[(set (match_dup 4)
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@ -1,3 +1,10 @@
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2016-05-10 Jakub Jelinek <jakub@redhat.com>
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PR target/70927
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* gcc.target/i386/avx512vl-logic-1.c: New test.
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* gcc.target/i386/avx512vl-logic-2.c: New test.
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* gcc.target/i386/avx512dq-logic-2.c: New test.
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2016-05-10 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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PR target/70963
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196
gcc/testsuite/gcc.target/i386/avx512dq-logic-2.c
Normal file
196
gcc/testsuite/gcc.target/i386/avx512dq-logic-2.c
Normal file
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@ -0,0 +1,196 @@
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/* { dg-do compile { target { ! ia32 } } } */
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/* { dg-options "-O2 -mavx512vl -mavx512dq" } */
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#include <x86intrin.h>
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__m128d
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f1 (__m128d a, __m128d b)
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{
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register __m128d c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm_and_pd (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vandpd\[^\n\r\]*xmm\[0-9\]" 1 } } */
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__m128d
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f2 (__m128d a, __m128d b)
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{
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register __m128d c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm_or_pd (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vorpd\[^\n\r\]*xmm\[0-9\]" 1 } } */
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__m128d
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f3 (__m128d a, __m128d b)
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{
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register __m128d c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm_xor_pd (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vxorpd\[^\n\r\]*xmm\[0-9\]" 1 } } */
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__m128d
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f4 (__m128d a, __m128d b)
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{
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register __m128d c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm_andnot_pd (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vandnpd\[^\n\r\]*xmm\[0-9\]" 1 } } */
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__m128
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f5 (__m128 a, __m128 b)
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{
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register __m128 c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm_and_ps (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vandps\[^\n\r\]*xmm\[0-9\]" 1 } } */
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__m128
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f6 (__m128 a, __m128 b)
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{
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register __m128 c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm_or_ps (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vorps\[^\n\r\]*xmm\[0-9\]" 1 } } */
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__m128
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f7 (__m128 a, __m128 b)
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{
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register __m128 c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm_xor_ps (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vxorps\[^\n\r\]*xmm\[0-9\]" 1 } } */
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__m128
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f8 (__m128 a, __m128 b)
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{
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register __m128 c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm_andnot_ps (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vandnps\[^\n\r\]*xmm\[0-9\]" 1 } } */
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__m256d
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f9 (__m256d a, __m256d b)
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{
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register __m256d c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm256_and_pd (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vandpd\[^\n\r\]*ymm\[0-9\]" 1 } } */
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__m256d
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f10 (__m256d a, __m256d b)
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{
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register __m256d c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm256_or_pd (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vorpd\[^\n\r\]*ymm\[0-9\]" 1 } } */
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__m256d
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f11 (__m256d a, __m256d b)
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{
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register __m256d c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm256_xor_pd (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vxorpd\[^\n\r\]*ymm\[0-9\]" 1 } } */
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|
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__m256d
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f12 (__m256d a, __m256d b)
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{
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register __m256d c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm256_andnot_pd (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vandnpd\[^\n\r\]*ymm\[0-9\]" 1 } } */
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__m256
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f13 (__m256 a, __m256 b)
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{
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register __m256 c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm256_and_ps (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vandps\[^\n\r\]*ymm\[0-9\]" 1 } } */
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__m256
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f14 (__m256 a, __m256 b)
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{
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register __m256 c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm256_or_ps (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vorps\[^\n\r\]*ymm\[0-9\]" 1 } } */
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__m256
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f15 (__m256 a, __m256 b)
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{
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register __m256 c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm256_xor_ps (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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/* { dg-final { scan-assembler-times "vxorps\[^\n\r\]*ymm\[0-9\]" 1 } } */
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|
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__m256
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f16 (__m256 a, __m256 b)
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{
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register __m256 c __asm ("xmm16") = a;
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asm volatile ("" : "+v" (c));
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c = _mm256_andnot_ps (c, b);
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asm volatile ("" : "+v" (c));
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return c;
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}
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|
||||
/* { dg-final { scan-assembler-times "vandnps\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
132
gcc/testsuite/gcc.target/i386/avx512vl-logic-1.c
Normal file
132
gcc/testsuite/gcc.target/i386/avx512vl-logic-1.c
Normal file
|
|
@ -0,0 +1,132 @@
|
|||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -mavx512vl -mno-avx512dq" } */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
__m128d
|
||||
f1 (__m128d a, __m128d b)
|
||||
{
|
||||
return _mm_and_pd (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vandpd\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128d
|
||||
f2 (__m128d a, __m128d b)
|
||||
{
|
||||
return _mm_or_pd (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vorpd\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128d
|
||||
f3 (__m128d a, __m128d b)
|
||||
{
|
||||
return _mm_xor_pd (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vxorpd\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128d
|
||||
f4 (__m128d a, __m128d b)
|
||||
{
|
||||
return _mm_andnot_pd (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vandnpd\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128
|
||||
f5 (__m128 a, __m128 b)
|
||||
{
|
||||
return _mm_and_ps (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vandps\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128
|
||||
f6 (__m128 a, __m128 b)
|
||||
{
|
||||
return _mm_or_ps (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vorps\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128
|
||||
f7 (__m128 a, __m128 b)
|
||||
{
|
||||
return _mm_xor_ps (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vxorps\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128
|
||||
f8 (__m128 a, __m128 b)
|
||||
{
|
||||
return _mm_andnot_ps (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vandnps\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m256d
|
||||
f9 (__m256d a, __m256d b)
|
||||
{
|
||||
return _mm256_and_pd (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vandpd\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256d
|
||||
f10 (__m256d a, __m256d b)
|
||||
{
|
||||
return _mm256_or_pd (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vorpd\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256d
|
||||
f11 (__m256d a, __m256d b)
|
||||
{
|
||||
return _mm256_xor_pd (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vxorpd\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256d
|
||||
f12 (__m256d a, __m256d b)
|
||||
{
|
||||
return _mm256_andnot_pd (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vandnpd\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256
|
||||
f13 (__m256 a, __m256 b)
|
||||
{
|
||||
return _mm256_and_ps (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vandps\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256
|
||||
f14 (__m256 a, __m256 b)
|
||||
{
|
||||
return _mm256_or_ps (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vorps\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256
|
||||
f15 (__m256 a, __m256 b)
|
||||
{
|
||||
return _mm256_xor_ps (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vxorps\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256
|
||||
f16 (__m256 a, __m256 b)
|
||||
{
|
||||
return _mm256_andnot_ps (a, b);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vandnps\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
196
gcc/testsuite/gcc.target/i386/avx512vl-logic-2.c
Normal file
196
gcc/testsuite/gcc.target/i386/avx512vl-logic-2.c
Normal file
|
|
@ -0,0 +1,196 @@
|
|||
/* { dg-do compile { target { ! ia32 } } } */
|
||||
/* { dg-options "-O2 -mavx512vl -mno-avx512dq" } */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
__m128d
|
||||
f1 (__m128d a, __m128d b)
|
||||
{
|
||||
register __m128d c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm_and_pd (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpandq\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128d
|
||||
f2 (__m128d a, __m128d b)
|
||||
{
|
||||
register __m128d c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm_or_pd (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vporq\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128d
|
||||
f3 (__m128d a, __m128d b)
|
||||
{
|
||||
register __m128d c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm_xor_pd (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpxorq\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128d
|
||||
f4 (__m128d a, __m128d b)
|
||||
{
|
||||
register __m128d c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm_andnot_pd (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpandnq\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128
|
||||
f5 (__m128 a, __m128 b)
|
||||
{
|
||||
register __m128 c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm_and_ps (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpandd\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128
|
||||
f6 (__m128 a, __m128 b)
|
||||
{
|
||||
register __m128 c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm_or_ps (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpord\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128
|
||||
f7 (__m128 a, __m128 b)
|
||||
{
|
||||
register __m128 c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm_xor_ps (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpxord\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m128
|
||||
f8 (__m128 a, __m128 b)
|
||||
{
|
||||
register __m128 c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm_andnot_ps (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpandnd\[^\n\r\]*xmm\[0-9\]" 1 } } */
|
||||
|
||||
__m256d
|
||||
f9 (__m256d a, __m256d b)
|
||||
{
|
||||
register __m256d c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm256_and_pd (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpandq\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256d
|
||||
f10 (__m256d a, __m256d b)
|
||||
{
|
||||
register __m256d c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm256_or_pd (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vporq\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256d
|
||||
f11 (__m256d a, __m256d b)
|
||||
{
|
||||
register __m256d c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm256_xor_pd (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpxorq\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256d
|
||||
f12 (__m256d a, __m256d b)
|
||||
{
|
||||
register __m256d c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm256_andnot_pd (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpandnq\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256
|
||||
f13 (__m256 a, __m256 b)
|
||||
{
|
||||
register __m256 c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm256_and_ps (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpandd\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256
|
||||
f14 (__m256 a, __m256 b)
|
||||
{
|
||||
register __m256 c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm256_or_ps (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpord\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256
|
||||
f15 (__m256 a, __m256 b)
|
||||
{
|
||||
register __m256 c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm256_xor_ps (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpxord\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
|
||||
__m256
|
||||
f16 (__m256 a, __m256 b)
|
||||
{
|
||||
register __m256 c __asm ("xmm16") = a;
|
||||
asm volatile ("" : "+v" (c));
|
||||
c = _mm256_andnot_ps (c, b);
|
||||
asm volatile ("" : "+v" (c));
|
||||
return c;
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler-times "vpandnd\[^\n\r\]*ymm\[0-9\]" 1 } } */
|
||||
Loading…
Add table
Reference in a new issue