arm.c (arm_is_xscale): Rename to arm_arch_xscale.
2003-05-15 Philip Blundell <philb@gnu.org> * config/arm/arm.c (arm_is_xscale): Rename to arm_arch_xscale. All uses updated. (arm_tune_xscale): New variable. (arm_override_options): Set it. (arm_adjust_cost): Use it in place of arm_arch_xscale. (arm_gen_load_multiple): Likewise. (arm_gen_store_multiple): Likewise. * config/arm/arm.md (is_xscale): Likewise. * config/arm/arm.h (arm_tune_xscale): Declare. From-SVN: r66839
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4 changed files with 33 additions and 14 deletions
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@ -1,3 +1,15 @@
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2003-05-15 Philip Blundell <philb@gnu.org>
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* config/arm/arm.c (arm_is_xscale): Rename to arm_arch_xscale.
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All uses updated.
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(arm_tune_xscale): New variable.
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(arm_override_options): Set it.
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(arm_adjust_cost): Use it in place of arm_arch_xscale.
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(arm_gen_load_multiple): Likewise.
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(arm_gen_store_multiple): Likewise.
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* config/arm/arm.md (is_xscale): Likewise.
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* config/arm/arm.h (arm_tune_xscale): Declare.
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2003-05-15 Philip Blundell <philb@gnu.org>
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PR target/10730
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@ -303,7 +303,10 @@ int arm_ld_sched = 0;
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int arm_is_strong = 0;
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/* Nonzero if this chip is an XScale. */
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int arm_is_xscale = 0;
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int arm_arch_xscale = 0;
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/* Nonzero if tuning for XScale */
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int arm_tune_xscale = 0;
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/* Nonzero if this chip is an ARM6 or an ARM7. */
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int arm_is_6_or_7 = 0;
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@ -718,13 +721,14 @@ arm_override_options ()
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arm_arch4 = (insn_flags & FL_ARCH4) != 0;
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arm_arch5 = (insn_flags & FL_ARCH5) != 0;
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arm_arch5e = (insn_flags & FL_ARCH5E) != 0;
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arm_is_xscale = (insn_flags & FL_XSCALE) != 0;
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arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
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arm_ld_sched = (tune_flags & FL_LDSCHED) != 0;
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arm_is_strong = (tune_flags & FL_STRONG) != 0;
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thumb_code = (TARGET_ARM == 0);
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arm_is_6_or_7 = (((tune_flags & (FL_MODE26 | FL_MODE32))
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&& !(tune_flags & FL_ARCH4))) != 0;
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arm_tune_xscale = (tune_flags & FL_XSCALE) != 0;
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arm_is_cirrus = (tune_flags & FL_CIRRUS) != 0;
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if (arm_is_cirrus)
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@ -813,7 +817,7 @@ arm_override_options ()
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if (optimize_size || (tune_flags & FL_LDSCHED))
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arm_constant_limit = 1;
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if (arm_is_xscale)
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if (arm_arch_xscale)
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arm_constant_limit = 2;
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/* If optimizing for size, bump the number of instructions that we
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@ -3475,7 +3479,7 @@ arm_adjust_cost (insn, link, dep, cost)
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/* Some true dependencies can have a higher cost depending
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on precisely how certain input operands are used. */
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if (arm_is_xscale
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if (arm_tune_xscale
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&& REG_NOTE_KIND (link) == 0
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&& recog_memoized (insn) >= 0
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&& recog_memoized (dep) >= 0)
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@ -5187,7 +5191,7 @@ arm_gen_load_multiple (base_regno, count, from, up, write_back, unchanging_p,
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As a compromise, we use ldr for counts of 1 or 2 regs, and ldm
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for counts of 3 or 4 regs. */
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if (arm_is_xscale && count <= 2 && ! optimize_size)
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if (arm_tune_xscale && count <= 2 && ! optimize_size)
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{
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rtx seq;
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@ -5254,7 +5258,7 @@ arm_gen_store_multiple (base_regno, count, to, up, write_back, unchanging_p,
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/* See arm_gen_load_multiple for discussion of
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the pros/cons of ldm/stm usage for XScale. */
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if (arm_is_xscale && count <= 2 && ! optimize_size)
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if (arm_tune_xscale && count <= 2 && ! optimize_size)
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{
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rtx seq;
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@ -610,7 +610,10 @@ extern int arm_is_strong;
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extern int arm_is_cirrus;
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/* Nonzero if this chip is an XScale. */
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extern int arm_is_xscale;
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extern int arm_arch_xscale;
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/* Nonzero if tuning for XScale */
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extern int arm_tune_xscale;
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/* Nonzero if this chip is an ARM6 or an ARM7. */
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extern int arm_is_6_or_7;
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@ -728,7 +731,7 @@ extern int arm_is_6_or_7;
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#define BIGGEST_ALIGNMENT 32
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/* Make strings word-aligned so strcpy from constants will be faster. */
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#define CONSTANT_ALIGNMENT_FACTOR (TARGET_THUMB || ! arm_is_xscale ? 1 : 2)
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#define CONSTANT_ALIGNMENT_FACTOR (TARGET_THUMB || ! arm_arch_xscale ? 1 : 2)
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#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
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((TREE_CODE (EXP) == STRING_CST \
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@ -2119,7 +2122,7 @@ do { \
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#define MOVE_MAX 4
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#undef MOVE_RATIO
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#define MOVE_RATIO (arm_is_xscale ? 4 : 2)
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#define MOVE_RATIO (arm_arch_xscale ? 4 : 2)
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/* Define if operations between registers always perform the operation
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on the full register even if a narrower mode is specified. */
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@ -121,7 +121,7 @@
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;; Operand number of an input operand that is shifted. Zero if the
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;; given instruction does not shift one of its input operands.
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(define_attr "is_xscale" "no,yes" (const (symbol_ref "arm_is_xscale")))
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(define_attr "is_xscale" "no,yes" (const (symbol_ref "arm_tune_xscale")))
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(define_attr "shift" "" (const_int 0))
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; Floating Point Unit. If we only have floating point emulation, then there
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@ -1082,7 +1082,7 @@
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(const_int 0)))
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(set (match_operand:SI 0 "s_register_operand" "=&r,&r")
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(mult:SI (match_dup 2) (match_dup 1)))]
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"TARGET_ARM && !arm_is_xscale"
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"TARGET_ARM && !arm_arch_xscale"
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"mul%?s\\t%0, %2, %1"
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[(set_attr "conds" "set")
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(set_attr "type" "mult")]
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@ -1095,7 +1095,7 @@
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(match_operand:SI 1 "s_register_operand" "%?r,0"))
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(const_int 0)))
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(clobber (match_scratch:SI 0 "=&r,&r"))]
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"TARGET_ARM && !arm_is_xscale"
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"TARGET_ARM && !arm_arch_xscale"
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"mul%?s\\t%0, %2, %1"
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[(set_attr "conds" "set")
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(set_attr "type" "mult")]
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(set (match_operand:SI 0 "s_register_operand" "=&r,&r,&r,&r")
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(plus:SI (mult:SI (match_dup 2) (match_dup 1))
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(match_dup 3)))]
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"TARGET_ARM && !arm_is_xscale"
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"TARGET_ARM && !arm_arch_xscale"
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"mla%?s\\t%0, %2, %1, %3"
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[(set_attr "conds" "set")
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(set_attr "type" "mult")]
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(match_operand:SI 3 "s_register_operand" "?r,r,0,0"))
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(const_int 0)))
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(clobber (match_scratch:SI 0 "=&r,&r,&r,&r"))]
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"TARGET_ARM && !arm_is_xscale"
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"TARGET_ARM && !arm_arch_xscale"
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"mla%?s\\t%0, %2, %1, %3"
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[(set_attr "conds" "set")
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(set_attr "type" "mult")]
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