altivec.md: Fix vcond patterns using if_then_else.
2007-03-09 Sa Liu <saliu@de.ibm.com> * config/rs6000/altivec.md: Fix vcond patterns using if_then_else. From-SVN: r122755
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2 changed files with 53 additions and 56 deletions
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2007-03-09 Sa Liu <saliu@de.ibm.com>
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* config/rs6000/altivec.md: Fix vcond patterns using if_then_else.
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2007-03-09 Ian Lance Taylor <iant@google.com>
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* opts.c (common_handle_option): Treat -Wstrict-overflow (with no
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@ -131,13 +131,6 @@
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(UNSPEC_INTERLO_V8HI 233)
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(UNSPEC_INTERLO_V16QI 234)
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(UNSPEC_INTERLO_V4SF 235)
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(UNSPEC_VCOND_V4SI 301)
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(UNSPEC_VCOND_V4SF 302)
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(UNSPEC_VCOND_V8HI 303)
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(UNSPEC_VCOND_V16QI 304)
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(UNSPEC_VCONDU_V4SI 305)
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(UNSPEC_VCONDU_V8HI 306)
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(UNSPEC_VCONDU_V16QI 307)
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(UNSPEC_VMULWHUB 308)
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(UNSPEC_VMULWLUB 309)
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(UNSPEC_VMULWHSB 310)
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@ -1485,13 +1478,13 @@
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[(set_attr "type" "vecfloat")])
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(define_expand "vcondv4si"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V4SI 2 "register_operand" "v")
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(match_operand:V4SI 3 "comparison_operator" "")
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(match_operand:V4SI 4 "register_operand" "v")
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(match_operand:V4SI 5 "register_operand" "v")
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] UNSPEC_VCOND_V4SI))]
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(if_then_else:V4SI
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(match_operator 3 "comparison_operator"
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[(match_operand:V4SI 4 "register_operand" "v")
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(match_operand:V4SI 5 "register_operand" "v")])
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(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V4SI 2 "register_operand" "v")))]
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"TARGET_ALTIVEC"
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"
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{
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@ -1504,13 +1497,13 @@
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")
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(define_expand "vconduv4si"
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V4SI 2 "register_operand" "v")
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(match_operand:V4SI 3 "comparison_operator" "")
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(match_operand:V4SI 4 "register_operand" "v")
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(match_operand:V4SI 5 "register_operand" "v")
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] UNSPEC_VCONDU_V4SI))]
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[(set (match_operand:V4SI 0 "register_operand" "=v")
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(if_then_else:V4SI
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(match_operator 3 "comparison_operator"
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[(match_operand:V4SI 4 "register_operand" "v")
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(match_operand:V4SI 5 "register_operand" "v")])
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(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V4SI 2 "register_operand" "v")))]
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"TARGET_ALTIVEC"
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"
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{
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@ -1523,13 +1516,13 @@
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")
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(define_expand "vcondv4sf"
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[(set (match_operand:V4SF 0 "register_operand" "=v")
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(unspec:V4SF [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V4SF 2 "register_operand" "v")
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(match_operand:V4SF 3 "comparison_operator" "")
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(match_operand:V4SF 4 "register_operand" "v")
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(match_operand:V4SF 5 "register_operand" "v")
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] UNSPEC_VCOND_V4SF))]
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[(set (match_operand:V4SF 0 "register_operand" "=v")
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(if_then_else:V4SF
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(match_operator 3 "comparison_operator"
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[(match_operand:V4SF 4 "register_operand" "v")
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(match_operand:V4SF 5 "register_operand" "v")])
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(match_operand:V4SF 1 "register_operand" "v")
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(match_operand:V4SF 2 "register_operand" "v")))]
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"TARGET_ALTIVEC"
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"
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{
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@ -1542,13 +1535,13 @@
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")
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(define_expand "vcondv8hi"
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[(set (match_operand:V4SF 0 "register_operand" "=v")
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(unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V8HI 2 "register_operand" "v")
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(match_operand:V8HI 3 "comparison_operator" "")
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(match_operand:V8HI 4 "register_operand" "v")
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(match_operand:V8HI 5 "register_operand" "v")
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] UNSPEC_VCOND_V8HI))]
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[(set (match_operand:V8HI 0 "register_operand" "=v")
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(if_then_else:V8HI
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(match_operator 3 "comparison_operator"
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[(match_operand:V8HI 4 "register_operand" "v")
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(match_operand:V8HI 5 "register_operand" "v")])
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(match_operand:V8HI 1 "register_operand" "v")
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(match_operand:V8HI 2 "register_operand" "v")))]
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"TARGET_ALTIVEC"
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"
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{
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@ -1561,13 +1554,13 @@
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")
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(define_expand "vconduv8hi"
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[(set (match_operand:V4SF 0 "register_operand" "=v")
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(unspec:V8HI [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V8HI 2 "register_operand" "v")
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(match_operand:V8HI 3 "comparison_operator" "")
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(match_operand:V8HI 4 "register_operand" "v")
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(match_operand:V8HI 5 "register_operand" "v")
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] UNSPEC_VCONDU_V8HI))]
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[(set (match_operand:V8HI 0 "register_operand" "=v")
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(if_then_else:V8HI
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(match_operator 3 "comparison_operator"
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[(match_operand:V8HI 4 "register_operand" "v")
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(match_operand:V8HI 5 "register_operand" "v")])
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(match_operand:V8HI 1 "register_operand" "v")
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(match_operand:V8HI 2 "register_operand" "v")))]
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"TARGET_ALTIVEC"
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"
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{
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@ -1580,13 +1573,13 @@
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")
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(define_expand "vcondv16qi"
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[(set (match_operand:V4SF 0 "register_operand" "=v")
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(unspec:V16QI [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V16QI 2 "register_operand" "v")
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(match_operand:V16QI 3 "comparison_operator" "")
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(match_operand:V16QI 4 "register_operand" "v")
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(match_operand:V16QI 5 "register_operand" "v")
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] UNSPEC_VCOND_V16QI))]
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[(set (match_operand:V16QI 0 "register_operand" "=v")
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(if_then_else:V16QI
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(match_operator 3 "comparison_operator"
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[(match_operand:V16QI 4 "register_operand" "v")
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(match_operand:V16QI 5 "register_operand" "v")])
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(match_operand:V16QI 1 "register_operand" "v")
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(match_operand:V16QI 2 "register_operand" "v")))]
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"TARGET_ALTIVEC"
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"
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{
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@ -1599,13 +1592,13 @@
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")
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(define_expand "vconduv16qi"
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[(set (match_operand:V4SF 0 "register_operand" "=v")
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(unspec:V16QI [(match_operand:V4SI 1 "register_operand" "v")
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(match_operand:V16QI 2 "register_operand" "v")
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(match_operand:V16QI 3 "comparison_operator" "")
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(match_operand:V16QI 4 "register_operand" "v")
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(match_operand:V16QI 5 "register_operand" "v")
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] UNSPEC_VCONDU_V16QI))]
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[(set (match_operand:V16QI 0 "register_operand" "=v")
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(if_then_else:V16QI
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(match_operator 3 "comparison_operator"
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[(match_operand:V16QI 4 "register_operand" "v")
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(match_operand:V16QI 5 "register_operand" "v")])
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(match_operand:V16QI 1 "register_operand" "v")
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(match_operand:V16QI 2 "register_operand" "v")))]
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"TARGET_ALTIVEC"
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"
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{
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