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aarch64: Generalise tbz_2.c

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For many functions in tbz_2.c, it doesn't matter whether the code
tests a 32-bit or a 64-bit register.  g6-g8 have started testing
32-bit registers, but the others could in future too.

gcc/testsuite/
	* gcc.target/aarch64/tbz_2.c: Accept both 32-bit and 64-bit registers.
This commit is contained in:
Richard Sandiford 2025-03-11 15:39:00 +00:00
parent 4001281d69
commit 456924e078
1 changed files with 9 additions and 9 deletions
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18
gcc/testsuite/gcc.target/aarch64/tbz_2.c
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@ -20,7 +20,7 @@ void g1(int x)
/*
** g2:
** tbnz x0, 0, .L[0-9]+
** tbnz [wx]0, 0, .L[0-9]+
** ret
** ...
*/
@ -32,7 +32,7 @@ void g2(int x)
/*
** g3:
** tbnz x0, 3, .L[0-9]+
** tbnz [wx]0, 3, .L[0-9]+
** ret
** ...
*/
@ -44,7 +44,7 @@ void g3(int x)
/*
** g4:
** tbnz w0, #31, .L[0-9]+
** tbnz [wx]0, #31, .L[0-9]+
** ret
** ...
*/
@ -56,7 +56,7 @@ void g4(int x)
/*
** g5:
** tst w0, 255
** tst [wx]0, 255
** bne .L[0-9]+
** ret
** ...
@ -69,7 +69,7 @@ void g5(char x)
/*
** g6:
** tbnz x0, 0, .L[0-9]+
** tbnz [wx]0, 0, .L[0-9]+
** ret
** ...
*/
@ -81,7 +81,7 @@ void g6(char x)
/*
** g7:
** tst x0, 3
** tst [wx]0, 3
** bne .L[0-9]+
** ret
** ...
@ -94,7 +94,7 @@ void g7(char x)
/*
** g8:
** tbnz x0, 7, .L[0-9]+
** tbnz [wx]0, 7, .L[0-9]+
** ret
** ...
*/
@ -106,7 +106,7 @@ void g8(char x)
/*
** g9:
** tbnz w0, 0, .L[0-9]+
** tbnz [wx]0, 0, .L[0-9]+
** ret
** ...
*/
@ -118,7 +118,7 @@ void g9(bool x)
/*
** g10:
** tbnz w0, 0, .L[0-9]+
** tbnz [wx]0, 0, .L[0-9]+
** ret
** ...
*/