RISC-V: Fix ratio in vsetvl fuse rule [PR115703].
In PR115703 we fuse two vsetvls: Fuse curr info since prev info compatible with it: prev_info: VALID (insn 438, bb 2) Demand fields: demand_ge_sew demand_non_zero_avl SEW=32, VLMUL=m1, RATIO=32, MAX_SEW=64 TAIL_POLICY=agnostic, MASK_POLICY=agnostic AVL=(reg:DI 0 zero) VL=(reg:DI 9 s1 [312]) curr_info: VALID (insn 92, bb 20) Demand fields: demand_ratio_and_ge_sew demand_avl SEW=64, VLMUL=m1, RATIO=64, MAX_SEW=64 TAIL_POLICY=agnostic, MASK_POLICY=agnostic AVL=(const_int 4 [0x4]) VL=(nil) prev_info after fused: VALID (insn 438, bb 2) Demand fields: demand_ratio_and_ge_sew demand_avl SEW=64, VLMUL=mf2, RATIO=64, MAX_SEW=64 TAIL_POLICY=agnostic, MASK_POLICY=agnostic AVL=(const_int 4 [0x4]) VL=(nil). The result is vsetvl zero, zero, e64, mf2, ta, ma. The previous vsetvl set vl = 4 but here we wrongly set it to vl = 2. As all the following vsetvls only ever change the ratio we never recover. The issue is quite difficult to trigger because we can often deduce the value of d at runtime. Then very check for the value of d will be optimized away. The last known bad commit is r15-3458-g5326306e7d9d36. With that commit the output is wrong but -fno-schedule-insns makes it correct. From the next commit on the issue is latent. I still added the PR's test as scan and run check even if they don't trigger right now. Not sure if the run test will ever fail but well. I verified that the patch fixes the issue when applied on top of r15-3458-g5326306e7d9d36. PR target/115703 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc: Use max_sew for calculating the new LMUL. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr115703-run.c: New test. * gcc.target/riscv/rvv/autovec/pr115703.c: New test.
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3 changed files with 84 additions and 1 deletions
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@ -1756,7 +1756,8 @@ private:
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inline void use_max_sew_and_lmul_with_next_ratio (vsetvl_info &prev,
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const vsetvl_info &next)
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{
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prev.set_vlmul (calculate_vlmul (prev.get_sew (), next.get_ratio ()));
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int max_sew = MAX (prev.get_sew (), next.get_sew ());
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prev.set_vlmul (calculate_vlmul (max_sew, next.get_ratio ()));
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use_max_sew (prev, next);
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prev.set_ratio (next.get_ratio ());
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}
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44
gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115703-run.c
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gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115703-run.c
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@ -0,0 +1,44 @@
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/* { dg-do run } */
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/* { dg-require-effective-target rvv_zvl256b_ok } */
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/* { dg-options "-O3 -march=rv64gcv_zvl256b -mabi=lp64d -fwhole-program -fwrapv" } */
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int a, i;
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unsigned long b;
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unsigned c, f;
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long long d = 1;
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short e, m;
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long g, h;
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__attribute__ ((noipa))
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void check (unsigned long long x)
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{
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if (x != 13667643351234938049ull)
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__builtin_abort ();
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}
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int main() {
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for (int q = 0; q < 2; q += 1) {
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for (short r = 0; r < 2; r += 1)
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for (char s = 0; s < 6; s++)
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for (short t = 0; t < 011; t += 12081 - 12080)
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for (short u = 0; u < 11; u++) {
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a = ({ a > 1 ? a : 1; });
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b = ({ b > 5 ? b : 5; });
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for (short j = 0; j < 2; j = 2080)
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c = ({ c > 030 ? c : 030; });
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for (short k = 0; k < 2; k += 2080)
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d *= 7;
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e *= 10807;
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f = ({ f > 3 ? f : 3; });
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}
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for (int l = 0; l < 21; l += 1)
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for (int n = 0; n < 16; n++) {
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g = ({ m ? g : m; });
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for (char o = 0; o < 7; o += 1)
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h *= 3;
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i = ({ i < 0 ? i : 0; });
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}
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}
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check (d);
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}
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38
gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115703.c
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gcc/testsuite/gcc.target/riscv/rvv/autovec/pr115703.c
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@ -0,0 +1,38 @@
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/* { dg-do compile } */
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/* { dg-options "-O3 -march=rv64gcv_zvl256b -mabi=lp64d -fwhole-program -fwrapv" } */
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int a, i;
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unsigned long b;
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unsigned c, f;
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long long d = 1;
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short e, m;
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long g, h;
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int main() {
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for (int q = 0; q < 2; q += 1) {
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for (short r = 0; r < 2; r += 1)
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for (char s = 0; s < 6; s++)
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for (short t = 0; t < 011; t += 12081 - 12080)
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for (short u = 0; u < 11; u++) {
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a = ({ a > 1 ? a : 1; });
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b = ({ b > 5 ? b : 5; });
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for (short j = 0; j < 2; j = 2080)
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c = ({ c > 030 ? c : 030; });
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for (short k = 0; k < 2; k += 2080)
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d *= 7;
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e *= 10807;
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f = ({ f > 3 ? f : 3; });
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}
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for (int l = 0; l < 21; l += 1)
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for (int n = 0; n < 16; n++) {
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g = ({ m ? g : m; });
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for (char o = 0; o < 7; o += 1)
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h *= 3;
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i = ({ i < 0 ? i : 0; });
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}
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}
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__builtin_printf ("%llu\n", d);
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}
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/* { dg-final { scan-assembler-not "vset.*e64,mf2" } } */
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