rs6000.md (ctr{s,d}i_internal?): Add earlyclobber for MEM case.
* config/rs6000/rs6000.md (ctr{s,d}i_internal?): Add earlyclobber
for MEM case.
Co-Authored-By: J"orn Rennecke <joern.rennecke@superh.com>
From-SVN: r68788
This commit is contained in:
David Edelsohn
David Edelsohn
parent
33e9d2aa3d
commit
43b68ce57a
2 changed files with 66 additions and 60 deletions
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@ -1,3 +1,9 @@
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2003-07-01 David Edelsohn <edelsohn@gnu.org>
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J"orn Rennecke <joern.rennecke@superh.com>
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* config/rs6000/rs6000.md (ctr{s,d}i_internal?): Add earlyclobber
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for MEM case.
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2003-07-01 Devang Patel <dpatel@apple.com>
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* dbxout.c (DBXOUT_DECR_NESTING): Emit pending bincls, if required.
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@ -13989,15 +13989,15 @@
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(define_insn "*ctrsi_internal1"
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[(set (pc)
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(if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r")
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(if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r,*r")
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(const_int 1))
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(label_ref (match_operand 0 "" ""))
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(pc)))
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(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l")
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(plus:SI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,&r,r"))]
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"! TARGET_POWERPC64"
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"*
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{
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@ -14009,19 +14009,19 @@
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return \"bdz $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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(define_insn "*ctrsi_internal2"
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[(set (pc)
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(if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r")
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(if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r,*r")
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(const_int 1))
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(pc)
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(label_ref (match_operand 0 "" ""))))
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(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l")
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(plus:SI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,&r,r"))]
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"! TARGET_POWERPC64"
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"*
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{
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@ -14033,19 +14033,19 @@
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return \"{bdn|bdnz} $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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(define_insn "*ctrdi_internal1"
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[(set (pc)
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(if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r,*r")
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(const_int 1))
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(label_ref (match_operand 0 "" ""))
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(pc)))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,&r,r"))]
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"TARGET_POWERPC64"
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"*
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{
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@ -14057,19 +14057,19 @@
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return \"bdz $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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(define_insn "*ctrdi_internal2"
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[(set (pc)
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(if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r,*r")
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(const_int 1))
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(pc)
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(label_ref (match_operand 0 "" ""))))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,&r,r"))]
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"TARGET_POWERPC64"
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"*
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{
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@ -14081,21 +14081,21 @@
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return \"{bdn|bdnz} $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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;; Similar, but we can use GE since we have a REG_NONNEG.
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(define_insn "*ctrsi_internal3"
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[(set (pc)
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(if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r")
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(if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r,*r")
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(const_int 0))
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(label_ref (match_operand 0 "" ""))
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(pc)))
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(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l")
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(plus:SI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&X"))
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(clobber (match_scratch:SI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,&r,r"))]
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"! TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
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"*
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{
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@ -14107,19 +14107,19 @@
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return \"bdz $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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(define_insn "*ctrsi_internal4"
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[(set (pc)
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(if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r")
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(if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r,*r")
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(const_int 0))
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(pc)
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(label_ref (match_operand 0 "" ""))))
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(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l")
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(plus:SI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&X"))
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(clobber (match_scratch:SI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,&r,r"))]
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"! TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
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"*
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{
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@ -14131,19 +14131,19 @@
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return \"{bdn|bdnz} $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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(define_insn "*ctrdi_internal3"
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[(set (pc)
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(if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r,*r")
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(const_int 0))
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(label_ref (match_operand 0 "" ""))
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(pc)))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,&r,r"))]
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"TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
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"*
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{
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@ -14155,19 +14155,19 @@
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return \"bdz $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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(define_insn "*ctrdi_internal4"
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[(set (pc)
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(if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r,*r")
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(const_int 0))
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(pc)
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(label_ref (match_operand 0 "" ""))))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,&r,r"))]
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"TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)"
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"*
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{
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@ -14179,21 +14179,21 @@
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return \"{bdn|bdnz} $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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;; Similar but use EQ
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(define_insn "*ctrsi_internal5"
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[(set (pc)
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(if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r")
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(if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r,*r")
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(const_int 1))
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(label_ref (match_operand 0 "" ""))
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(pc)))
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(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l")
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(plus:SI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,&r,r"))]
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"! TARGET_POWERPC64"
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"*
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{
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@ -14205,19 +14205,19 @@
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return \"{bdn|bdnz} $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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(define_insn "*ctrsi_internal6"
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[(set (pc)
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(if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r")
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(if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r,*r")
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(const_int 1))
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(pc)
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(label_ref (match_operand 0 "" ""))))
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(set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l")
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(set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l")
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(plus:SI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:SI 4 "=X,X,&r,r"))]
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"! TARGET_POWERPC64"
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"*
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{
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@ -14229,19 +14229,19 @@
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return \"bdz $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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(define_insn "*ctrdi_internal5"
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[(set (pc)
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(if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r,*r")
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(const_int 1))
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(label_ref (match_operand 0 "" ""))
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(pc)))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,&r,r"))]
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"TARGET_POWERPC64"
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"*
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{
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@ -14253,19 +14253,19 @@
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return \"{bdn|bdnz} $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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(define_insn "*ctrdi_internal6"
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[(set (pc)
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(if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r")
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(if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r,*r")
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(const_int 1))
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(pc)
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(label_ref (match_operand 0 "" ""))))
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(set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l")
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(set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l")
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(plus:DI (match_dup 1)
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(const_int -1)))
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(clobber (match_scratch:CC 3 "=X,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,r"))]
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(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
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(clobber (match_scratch:DI 4 "=X,X,&r,r"))]
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"TARGET_POWERPC64"
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"*
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{
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@ -14277,7 +14277,7 @@
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return \"bdz $+8\;b %l0\";
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}"
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[(set_attr "type" "branch")
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(set_attr "length" "4,12,16")])
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(set_attr "length" "4,12,16,16")])
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;; Now the splitters if we could not allocate the CTR register
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