re PR target/82370 (AVX512 can use a memory operand for immediate-count vpsrlw, but gcc doesn't.)
PR target/82370 * config/i386/sse.md (VI248_AVX2, VI248_AVX512BW, VI248_AVX512BW_2): New mode iterators. (<shift_insn><mode>3<mask_name>): Change the last of the 3 define_insns for logical vector shifts to use VI248_AVX512BW iterator instead of VI48_AVX512, remove <mask_mode512bit_condition> condition, useless isa and prefix attributes. Change the first 2 of these define_insns to ... (<mask_codefor><shift_insn><mode>3<mask_name>): ... this, new define_insn for avx512vl. (<shift_insn><mode>3): ... and this, new define_insn without masking for non-avx512vl. * gcc.target/i386/avx-pr82370.c: New test. * gcc.target/i386/avx2-pr82370.c: New test. * gcc.target/i386/avx512f-pr82370.c: New test. * gcc.target/i386/avx512bw-pr82370.c: New test. * gcc.target/i386/avx512vl-pr82370.c: New test. * gcc.target/i386/avx512vlbw-pr82370.c: New test. From-SVN: r253924
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
c274eebe4e
commit
42a764f76f
9 changed files with 280 additions and 34 deletions
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@ -1,5 +1,18 @@
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2017-10-20 Jakub Jelinek <jakub@redhat.com>
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PR target/82370
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* config/i386/sse.md (VI248_AVX2, VI248_AVX512BW, VI248_AVX512BW_2):
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New mode iterators.
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(<shift_insn><mode>3<mask_name>): Change the last of the 3
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define_insns for logical vector shifts to use VI248_AVX512BW
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iterator instead of VI48_AVX512, remove <mask_mode512bit_condition>
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condition, useless isa and prefix attributes. Change the first
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2 of these define_insns to ...
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(<mask_codefor><shift_insn><mode>3<mask_name>): ... this, new
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define_insn for avx512vl.
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(<shift_insn><mode>3): ... and this, new define_insn without
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masking for non-avx512vl.
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PR target/82370
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* config/i386/sse.md (*andnot<mode>3,
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<mask_codefor><code><mode>3<mask_name>, *<code><mode>3): Split
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@ -403,11 +403,19 @@
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[(V8SI "TARGET_AVX2") V4SI
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(V4DI "TARGET_AVX2") V2DI])
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(define_mode_iterator VI248_AVX2
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[(V16HI "TARGET_AVX2") V8HI
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(V8SI "TARGET_AVX2") V4SI
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(V4DI "TARGET_AVX2") V2DI])
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(define_mode_iterator VI248_AVX2_8_AVX512F_24_AVX512BW
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[(V32HI "TARGET_AVX512BW") (V16HI "TARGET_AVX2") V8HI
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(V16SI "TARGET_AVX512BW") (V8SI "TARGET_AVX2") V4SI
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(V8DI "TARGET_AVX512F") (V4DI "TARGET_AVX2") V2DI])
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(define_mode_iterator VI248_AVX512BW
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[(V32HI "TARGET_AVX512BW") V16SI V8DI])
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(define_mode_iterator VI248_AVX512BW_AVX512VL
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[(V32HI "TARGET_AVX512BW")
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(V4DI "TARGET_AVX512VL") V16SI V8DI])
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@ -418,6 +426,11 @@
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V8SI V4SI
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V2DI])
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(define_mode_iterator VI248_AVX512BW_2
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[(V16HI "TARGET_AVX512BW") (V8HI "TARGET_AVX512BW")
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V8SI V4SI
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V4DI V2DI])
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(define_mode_iterator VI48_AVX512F
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[(V16SI "TARGET_AVX512F") V8SI V4SI
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(V8DI "TARGET_AVX512F") V4DI V2DI])
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@ -10731,15 +10744,29 @@
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(const_string "0")))
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "<shift_insn><mode>3<mask_name>"
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[(set (match_operand:VI2_AVX2_AVX512BW 0 "register_operand" "=x,v")
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(any_lshift:VI2_AVX2_AVX512BW
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(match_operand:VI2_AVX2_AVX512BW 1 "register_operand" "0,v")
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(match_operand:DI 2 "nonmemory_operand" "xN,vN")))]
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"TARGET_SSE2 && <mask_mode512bit_condition> && <mask_avx512bw_condition>"
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(define_insn "<mask_codefor><shift_insn><mode>3<mask_name>"
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[(set (match_operand:VI248_AVX512BW_2 0 "register_operand" "=v,v")
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(any_lshift:VI248_AVX512BW_2
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(match_operand:VI248_AVX512BW_2 1 "nonimmediate_operand" "v,vm")
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(match_operand:DI 2 "nonmemory_operand" "v,N")))]
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"TARGET_AVX512VL"
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"vp<vshift><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
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[(set_attr "type" "sseishft")
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(set (attr "length_immediate")
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(if_then_else (match_operand 2 "const_int_operand")
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(const_string "1")
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(const_string "0")))
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "<shift_insn><mode>3"
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[(set (match_operand:VI248_AVX2 0 "register_operand" "=x,x")
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(any_lshift:VI248_AVX2
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(match_operand:VI248_AVX2 1 "register_operand" "0,x")
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(match_operand:DI 2 "nonmemory_operand" "xN,xN")))]
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"TARGET_SSE2"
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"@
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p<vshift><ssemodesuffix>\t{%2, %0|%0, %2}
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vp<vshift><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
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vp<vshift><ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "isa" "noavx,avx")
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(set_attr "type" "sseishft")
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(set (attr "length_immediate")
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@ -10751,39 +10778,17 @@
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "<shift_insn><mode>3<mask_name>"
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[(set (match_operand:VI48_AVX2 0 "register_operand" "=x,x,v")
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(any_lshift:VI48_AVX2
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(match_operand:VI48_AVX2 1 "register_operand" "0,x,v")
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(match_operand:DI 2 "nonmemory_operand" "xN,xN,vN")))]
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"TARGET_SSE2 && <mask_mode512bit_condition>"
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"@
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p<vshift><ssemodesuffix>\t{%2, %0|%0, %2}
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vp<vshift><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}
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vp<vshift><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
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[(set_attr "isa" "noavx,avx,avx512bw")
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(set_attr "type" "sseishft")
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(set (attr "length_immediate")
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(if_then_else (match_operand 2 "const_int_operand")
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(const_string "1")
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(const_string "0")))
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(set_attr "prefix_data16" "1,*,*")
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(set_attr "prefix" "orig,vex,evex")
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "<shift_insn><mode>3<mask_name>"
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[(set (match_operand:VI48_512 0 "register_operand" "=v,v")
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(any_lshift:VI48_512
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(match_operand:VI48_512 1 "nonimmediate_operand" "v,m")
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[(set (match_operand:VI248_AVX512BW 0 "register_operand" "=v,v")
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(any_lshift:VI248_AVX512BW
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(match_operand:VI248_AVX512BW 1 "nonimmediate_operand" "v,m")
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(match_operand:DI 2 "nonmemory_operand" "vN,N")))]
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"TARGET_AVX512F && <mask_mode512bit_condition>"
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"TARGET_AVX512F"
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"vp<vshift><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
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[(set_attr "isa" "avx512f")
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(set_attr "type" "sseishft")
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[(set_attr "type" "sseishft")
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(set (attr "length_immediate")
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(if_then_else (match_operand 2 "const_int_operand")
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(const_string "1")
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(const_string "0")))
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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@ -1,3 +1,13 @@
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2017-10-20 Jakub Jelinek <jakub@redhat.com>
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PR target/82370
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* gcc.target/i386/avx-pr82370.c: New test.
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* gcc.target/i386/avx2-pr82370.c: New test.
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* gcc.target/i386/avx512f-pr82370.c: New test.
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* gcc.target/i386/avx512bw-pr82370.c: New test.
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* gcc.target/i386/avx512vl-pr82370.c: New test.
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* gcc.target/i386/avx512vlbw-pr82370.c: New test.
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2017-10-20 Orlando Arias <oarias@knights.ucf.edu>
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* lib/target-supports.exp (check_effective_target_keeps_null_pointer_checks):
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65
gcc/testsuite/gcc.target/i386/avx-pr82370.c
Normal file
65
gcc/testsuite/gcc.target/i386/avx-pr82370.c
Normal file
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@ -0,0 +1,65 @@
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/* PR target/82370 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -mavx -mno-avx2 -masm=att" } */
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/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 3 } } */
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/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 3 } } */
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/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 3 } } */
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/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 3 } } */
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/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 0 } } */
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/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 3 } } */
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/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 3 } } */
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/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 3 } } */
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/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 3 } } */
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typedef short int v32hi __attribute__((vector_size (64)));
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typedef short int v16hi __attribute__((vector_size (32)));
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typedef short int v8hi __attribute__((vector_size (16)));
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typedef int v16si __attribute__((vector_size (64)));
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typedef int v8si __attribute__((vector_size (32)));
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typedef int v4si __attribute__((vector_size (16)));
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typedef long long int v8di __attribute__((vector_size (64)));
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typedef long long int v4di __attribute__((vector_size (32)));
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typedef long long int v2di __attribute__((vector_size (16)));
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typedef unsigned short int v32uhi __attribute__((vector_size (64)));
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typedef unsigned short int v16uhi __attribute__((vector_size (32)));
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typedef unsigned short int v8uhi __attribute__((vector_size (16)));
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typedef unsigned int v16usi __attribute__((vector_size (64)));
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typedef unsigned int v8usi __attribute__((vector_size (32)));
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typedef unsigned int v4usi __attribute__((vector_size (16)));
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typedef unsigned long long int v8udi __attribute__((vector_size (64)));
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typedef unsigned long long int v4udi __attribute__((vector_size (32)));
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typedef unsigned long long int v2udi __attribute__((vector_size (16)));
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#ifdef __AVX512F__
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v32hi f1 (v32hi *x) { return *x >> 3; }
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v32uhi f2 (v32uhi *x) { return *x >> 5; }
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v32uhi f3 (v32uhi *x) { return *x << 7; }
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#endif
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v16hi f4 (v16hi *x) { return *x >> 3; }
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v16uhi f5 (v16uhi *x) { return *x >> 5; }
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v16uhi f6 (v16uhi *x) { return *x << 7; }
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v8hi f7 (v8hi *x) { return *x >> 3; }
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v8uhi f8 (v8uhi *x) { return *x >> 5; }
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v8uhi f9 (v8uhi *x) { return *x << 7; }
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#ifdef __AVX512F__
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v16si f10 (v16si *x) { return *x >> 3; }
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v16usi f11 (v16usi *x) { return *x >> 5; }
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v16usi f12 (v16usi *x) { return *x << 7; }
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#endif
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v8si f13 (v8si *x) { return *x >> 3; }
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v8usi f14 (v8usi *x) { return *x >> 5; }
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v8usi f15 (v8usi *x) { return *x << 7; }
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v4si f16 (v4si *x) { return *x >> 3; }
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v4usi f17 (v4usi *x) { return *x >> 5; }
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v4usi f18 (v4usi *x) { return *x << 7; }
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#ifdef __AVX512F__
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v8di f19 (v8di *x) { return *x >> 3; }
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v8udi f20 (v8udi *x) { return *x >> 5; }
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v8udi f21 (v8udi *x) { return *x << 7; }
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#endif
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v4di f22 (v4di *x) { return *x >> 3; }
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v4udi f23 (v4udi *x) { return *x >> 5; }
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v4udi f24 (v4udi *x) { return *x << 7; }
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v2di f25 (v2di *x) { return *x >> 3; }
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v2udi f26 (v2udi *x) { return *x >> 5; }
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v2udi f27 (v2udi *x) { return *x << 7; }
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23
gcc/testsuite/gcc.target/i386/avx2-pr82370.c
Normal file
23
gcc/testsuite/gcc.target/i386/avx2-pr82370.c
Normal file
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@ -0,0 +1,23 @@
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/* PR target/82370 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -mavx2 -mno-avx512f -masm=att" } */
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/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 0 } } */
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/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 0 } } */
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/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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#include "avx-pr82370.c"
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33
gcc/testsuite/gcc.target/i386/avx512bw-pr82370.c
Normal file
33
gcc/testsuite/gcc.target/i386/avx512bw-pr82370.c
Normal file
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@ -0,0 +1,33 @@
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/* PR target/82370 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -mavx512bw -mno-avx512vl -masm=att" } */
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/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 0 } } */
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/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
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||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vps\[lr]\[la]\[dwq]\[ \t]\+\\\$\[357], %zmm\[0-9]\+, %zmm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
|
||||
#include "avx-pr82370.c"
|
||||
33
gcc/testsuite/gcc.target/i386/avx512f-pr82370.c
Normal file
33
gcc/testsuite/gcc.target/i386/avx512f-pr82370.c
Normal file
|
|
@ -0,0 +1,33 @@
|
|||
/* PR target/82370 */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -mavx512f -mno-avx512bw -mno-avx512vl -masm=att" } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 3 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 3 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 3 } } */
|
||||
/* { dg-final { scan-assembler-times "vps\[lr]\[la]\[dwq]\[ \t]\+\\\$\[357], %zmm\[0-9]\+, %zmm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 0 } } */
|
||||
|
||||
#include "avx-pr82370.c"
|
||||
31
gcc/testsuite/gcc.target/i386/avx512vl-pr82370.c
Normal file
31
gcc/testsuite/gcc.target/i386/avx512vl-pr82370.c
Normal file
|
|
@ -0,0 +1,31 @@
|
|||
/* PR target/82370 */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -mavx512vl -mno-avx512bw -masm=att" } */
|
||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, %xmm\[0-9]\+, %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, %ymm\[0-9]\+, %ymm\[0-9]\+" 3 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, %ymm\[0-9]\+, %ymm\[0-9]\+" 3 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, %ymm\[0-9]\+, %ymm\[0-9]\+" 3 } } */
|
||||
/* { dg-final { scan-assembler-times "vps\[lr]\[la]\[dq]\[ \t]\+\\\$\[357], %\[xyz]mm\[0-9]\+, %\[xyz]mm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vps\[lr]\[la]w\[ \t]\+\\\$\[357], \\(%\[a-z0-9,]*\\), %\[xyz]mm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
|
||||
#include "avx-pr82370.c"
|
||||
33
gcc/testsuite/gcc.target/i386/avx512vlbw-pr82370.c
Normal file
33
gcc/testsuite/gcc.target/i386/avx512vlbw-pr82370.c
Normal file
|
|
@ -0,0 +1,33 @@
|
|||
/* PR target/82370 */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -mavx512vl -mavx512bw -masm=att" } */
|
||||
/* { dg-final { scan-assembler-times "vps\[lr]\[la]\[dwq]\[ \t]\+\\\$\[357], %\[xyz]mm\[0-9]\+, %\[xyz]mm\[0-9]\+" 0 } } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %xmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %ymm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpslld\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllq\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsllw\[ \t]\+\\\$7, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrad\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraq\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsraw\[ \t]\+\\\$3, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrld\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlq\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "vpsrlw\[ \t]\+\\\$5, \\(%\[a-z0-9,]*\\), %zmm\[0-9]\+" 1 } } */
|
||||
|
||||
#include "avx-pr82370.c"
|
||||
Loading…
Add table
Reference in a new issue