i386.md (divmodsi4): Rewrite to expander.

Mon Nov 15 22:45:39 CET 1999  Jan Hubicka  <hubicka@freesoft.cz>
	* i386.md (divmodsi4): Rewrite to expander.
	(*divmodsi4_nocltd): New.
	(*divmodsi4_cltd): New.
	(divmodsi4 splitter): Handle the case when input comes in edx.
	(udivmodhi4): Do not use constraints in exander.
	(ashrsi3_31): Conditionize by TARGET_USE_CLTD.

From-SVN: r30555
This commit is contained in:
Jan Hubicka 1999-11-17 18:39:18 +01:00 committed by Jan Hubicka
parent 75e3fbdfe8
commit 40745eecaf
2 changed files with 59 additions and 22 deletions

View file

@ -1,3 +1,11 @@
Mon Nov 15 22:45:39 CET 1999 Jan Hubicka <hubicka@freesoft.cz>
* i386.md (divmodsi4): Rewrite to expander.
(*divmodsi4_nocltd): New.
(*divmodsi4_cltd): New.
(divmodsi4 splitter): Handle the case when input comes in edx.
(udivmodhi4): Do not use constraints in exander.
(ashrsi3_31): Conditionize by TARGET_USE_CLTD.
1999-11-17 Jason Merrill <jason@yorick.cygnus.com>
* dwarf2out.c (push_decl_scope): Still use decl_scope_depth - 1

View file

@ -3825,25 +3825,48 @@
"")
;; Remainder instructions.
(define_insn "divmodsi4"
[(set (match_operand:SI 0 "register_operand" "=a")
(div:SI (match_operand:SI 1 "register_operand" "A")
(match_operand:SI 2 "nonimmediate_operand" "rm")))
(set (match_operand:SI 3 "register_operand" "=&d")
(mod:SI (match_dup 1) (match_dup 2)))
(clobber (reg:CC 17))]
(define_expand "divmodsi4"
[(parallel [(set (match_operand:SI 0 "register_operand" "")
(div:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonimmediate_operand" "")))
(set (match_operand:SI 3 "register_operand" "")
(mod:SI (match_dup 1) (match_dup 2)))
(clobber (reg:CC 17))])]
""
"{cltd|cdq}\;idiv{l}\\t%2"
"")
;; Allow to come the parameter in eax or edx to avoid extra moves.
;; Penalize eax case sligthly because it results in worse scheduling
;; of code.
(define_insn "*divmodsi4_nocltd"
[(set (match_operand:SI 0 "register_operand" "=&a,?a")
(div:SI (match_operand:SI 2 "register_operand" "1,0")
(match_operand:SI 3 "nonimmediate_operand" "rm,rm")))
(set (match_operand:SI 1 "register_operand" "=&d,&d")
(mod:SI (match_dup 2) (match_dup 3)))
(clobber (reg:CC 17))]
"!optimize_size && !TARGET_USE_CLTD"
"#"
[(set_attr "type" "multi")])
(define_insn "*divmodsi4_cltd"
[(set (match_operand:SI 0 "register_operand" "=a")
(div:SI (match_operand:SI 2 "register_operand" "a")
(match_operand:SI 3 "nonimmediate_operand" "rm")))
(set (match_operand:SI 1 "register_operand" "=&d")
(mod:SI (match_dup 2) (match_dup 3)))
(clobber (reg:CC 17))]
"optimize_size || TARGET_USE_CLTD"
"#"
[(set_attr "type" "multi")])
(define_insn "*divmodsi_noext"
[(set (match_operand:SI 0 "register_operand" "=a")
(div:SI (match_operand:SI 1 "register_operand" "A")
(div:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "nonimmediate_operand" "rm")))
(set (match_operand:SI 3 "register_operand" "=d")
(mod:SI (match_dup 1) (match_dup 2)))
(use (match_dup 3))
(use (match_operand:SI 4 "register_operand" "3"))
(clobber (reg:CC 17))]
""
"idiv{l}\\t%2"
@ -3862,23 +3885,29 @@
(ashiftrt:SI (match_dup 4) (const_int 31)))
(clobber (reg:CC 17))])
(parallel [(set (match_dup 0)
(div:SI (match_dup 1) (match_dup 2)))
(div:SI (reg:SI 0) (match_dup 2)))
(set (match_dup 3)
(mod:SI (match_dup 1) (match_dup 2)))
(mod:SI (reg:SI 0) (match_dup 2)))
(use (match_dup 3))
(clobber (reg:CC 17))])]
"
{
/* Avoid use of cltd in favour of a mov+shift. */
if (TARGET_PENTIUM && !optimize_size)
if (!TARGET_USE_CLTD && !optimize_size)
{
emit_move_insn (operands[3], operands[1]);
if (true_regnum (operands[1]))
emit_move_insn (operands[0], operands[1]);
else
emit_move_insn (operands[3], operands[1]);
operands[4] = operands[3];
}
else
operands[4] = operands[1];
{
if (true_regnum (operands[1]))
abort();
operands[4] = operands[1];
}
}")
;; %%% Split me.
(define_insn "divmodhi4"
[(set (match_operand:HI 0 "register_operand" "=a")
@ -3936,10 +3965,10 @@
(define_expand "udivmodhi4"
[(parallel [(set (match_dup 4) (const_int 0))
(clobber (reg:CC 17))])
(parallel [(set (match_operand:HI 0 "register_operand" "=a")
(udiv:HI (match_operand:HI 1 "register_operand" "0")
(match_operand:HI 2 "nonimmediate_operand" "rm")))
(set (match_operand:HI 3 "register_operand" "=&d")
(parallel [(set (match_operand:HI 0 "register_operand" "")
(udiv:HI (match_operand:HI 1 "register_operand" "")
(match_operand:HI 2 "nonimmediate_operand" "")))
(set (match_operand:HI 3 "register_operand" "")
(umod:HI (match_dup 1) (match_dup 2)))
(use (match_dup 4))
(clobber (reg:CC 17))])]
@ -5432,7 +5461,7 @@
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "*a,0")
(match_operand:SI 2 "const_int_operand" "i,i")))
(clobber (reg:CC 17))]
"INTVAL (operands[2]) == 31"
"INTVAL (operands[2]) == 31 && TARGET_USE_CLTD"
"@
{cltd|cdq}
sar{l}\\t{%2, %0|%0, %2}"