From 401dc18184af6b32a3ccbe1eaeed0c7ff9ae1d5a Mon Sep 17 00:00:00 2001 From: Pan Li Date: Mon, 13 Nov 2023 11:06:38 +0800 Subject: [PATCH] RISC-V: Fix RVV dynamic frm tests failure The hancement of mode-switching performs some optimization when emit the frm backup insn, some redudant fsrm insns are removed for the following test cases. This patch would like to adjust the asm check for above optimization. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/float-point-dynamic-frm-54.c: Adjust the asm checker. * gcc.target/riscv/rvv/base/float-point-dynamic-frm-57.c: Ditto. * gcc.target/riscv/rvv/base/float-point-dynamic-frm-58.c: Ditto. Signed-off-by: Pan Li --- .../gcc.target/riscv/rvv/base/float-point-dynamic-frm-54.c | 2 +- .../gcc.target/riscv/rvv/base/float-point-dynamic-frm-57.c | 2 +- .../gcc.target/riscv/rvv/base/float-point-dynamic-frm-58.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-54.c b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-54.c index 8c67d4bba81..f33f303c0cb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-54.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-54.c @@ -33,6 +33,6 @@ test_float_point_dynamic_frm (vfloat32m1_t op1, vfloat32m1_t op2, /* { dg-final { scan-assembler-times {vfadd\.v[vf]\s+v[0-9]+,\s*v[0-9]+,\s*[fav]+[0-9]+} 4 } } */ /* { dg-final { scan-assembler-times {frrm\s+[axs][0-9]+} 3 } } */ -/* { dg-final { scan-assembler-times {fsrm\s+[axs][0-9]+} 4 } } */ +/* { dg-final { scan-assembler-times {fsrm\s+[axs][0-9]+} 2 } } */ /* { dg-final { scan-assembler-times {fsrmi\s+[01234]} 1 } } */ /* { dg-final { scan-assembler-not {fsrmi\s+[axs][0-9]+,\s*[01234]} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-57.c b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-57.c index 7ac9c960e65..cc0fb556da3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-57.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-57.c @@ -33,6 +33,6 @@ test_float_point_dynamic_frm (vfloat32m1_t op1, vfloat32m1_t op2, /* { dg-final { scan-assembler-times {vfadd\.v[vf]\s+v[0-9]+,\s*v[0-9]+,\s*[fav]+[0-9]+} 4 } } */ /* { dg-final { scan-assembler-times {frrm\s+[axs][0-9]+} 3 } } */ -/* { dg-final { scan-assembler-times {fsrm\s+[axs][0-9]+} 4 } } */ +/* { dg-final { scan-assembler-times {fsrm\s+[axs][0-9]+} 2 } } */ /* { dg-final { scan-assembler-times {fsrmi\s+[01234]} 1 } } */ /* { dg-final { scan-assembler-not {fsrmi\s+[axs][0-9]+,\s*[01234]} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-58.c b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-58.c index c5f96bc45c0..c5c3408be30 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-58.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-dynamic-frm-58.c @@ -33,6 +33,6 @@ test_float_point_dynamic_frm (vfloat32m1_t op1, vfloat32m1_t op2, /* { dg-final { scan-assembler-times {vfadd\.v[vf]\s+v[0-9]+,\s*v[0-9]+,\s*[fav]+[0-9]+} 4 } } */ /* { dg-final { scan-assembler-times {frrm\s+[axs][0-9]+} 3 } } */ -/* { dg-final { scan-assembler-times {fsrm\s+[axs][0-9]+} 4 } } */ +/* { dg-final { scan-assembler-times {fsrm\s+[axs][0-9]+} 2 } } */ /* { dg-final { scan-assembler-times {fsrmi\s+[01234]} 2 } } */ /* { dg-final { scan-assembler-not {fsrmi\s+[axs][0-9]+,\s*[01234]} } } */