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mips32-dspr2-type.c: New test.

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* gcc.target/mips/mips32-dspr2-type.c: New test.
* gcc.target/mips/mips32-dspr2.c: New test.
* gcc.target/mips/dspr2-MULT.c: New test.
* gcc.target/mips/dspr2-MULTU.c: New test.
* gcc.target/mips/mips32-dsp-run.c: New test to check execution.
* gcc.target/mips/mips32-dsp.c: Change v4i8 typedef to use signed char.
Adjust some formats.

From-SVN: r122757
This commit is contained in:
Chao-ying Fu 2007-03-09 19:23:22 +00:00 • committed by Chao-ying Fu
parent 3204138527
commit 3f868e1cef
7 changed files with 1705 additions and 99 deletions
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10
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,13 @@
2007-03-09 Chao-ying Fu <fu@mips.com>
* gcc.target/mips/mips32-dspr2-type.c: New test.
* gcc.target/mips/mips32-dspr2.c: New test.
* gcc.target/mips/dspr2-MULT.c: New test.
* gcc.target/mips/dspr2-MULTU.c: New test.
* gcc.target/mips/mips32-dsp-run.c: New test to check execution.
* gcc.target/mips/mips32-dsp.c: Change v4i8 typedef to use signed char.
Adjust some formats.
2007-03-09 Dirk Mueller <dmueller@suse.de>
PR c++/17946

21
gcc/testsuite/gcc.target/mips/dspr2-MULT.c Normal file
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@ -0,0 +1,21 @@
/* Test MIPS32 DSP REV 2 MULT instruction */
/* { dg-do compile } */
/* { dg-mips-options "-march=mips32r2 -mdspr2 -O2 -ffixed-hi -ffixed-lo" } */
/* { dg-final { scan-assembler "\tmult\t" } } */
/* { dg-final { scan-assembler "ac1" } } */
/* { dg-final { scan-assembler "ac2" } } */
/* { dg-final { scan-assembler "ac3" } } */
typedef long long a64;
a64 a[4];
int b[4], c[4];
void test ()
{
a[0] = (a64) b[0] * c[0];
a[1] = (a64) b[1] * c[1];
a[2] = (a64) b[2] * c[2];
a[3] = (a64) b[3] * c[3];
}

21
gcc/testsuite/gcc.target/mips/dspr2-MULTU.c Normal file
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@ -0,0 +1,21 @@
/* Test MIPS32 DSP REV 2 MULTU instruction */
/* { dg-do compile } */
/* { dg-mips-options "-march=mips32r2 -mdspr2 -O2 -ffixed-hi -ffixed-lo" } */
/* { dg-final { scan-assembler "\tmultu\t" } } */
/* { dg-final { scan-assembler "ac1" } } */
/* { dg-final { scan-assembler "ac2" } } */
/* { dg-final { scan-assembler "ac3" } } */
typedef long long a64;
a64 a[4];
unsigned int b[4], c[4];
void test ()
{
a[0] = (a64) b[0] * c[0];
a[1] = (a64) b[1] * c[1];
a[2] = (a64) b[2] * c[2];
a[3] = (a64) b[3] * c[3];
}

1001
gcc/testsuite/gcc.target/mips/mips32-dsp-run.c Normal file
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File diff suppressed because it is too large Load diff

198
gcc/testsuite/gcc.target/mips/mips32-dsp.c
View file

@ -96,19 +96,19 @@
#include <stdlib.h>
#include <stdio.h>
typedef char v4i8 __attribute__ ((vector_size(4)));
typedef signed char v4i8 __attribute__ ((vector_size(4)));
typedef short v2q15 __attribute__ ((vector_size(4)));
typedef int q31;
typedef int i32;
typedef long long a64;
void test_MIPS_DSP();
void test_MIPS_DSP (void);
char array[100];
int little_endian;
int main()
int main ()
{
int i;
@ -119,7 +119,7 @@ int main()
for (i = 0; i < 100; i++)
array[i] = i;
test_MIPS_DSP();
test_MIPS_DSP ();
exit (0);
}
@ -144,7 +144,7 @@ v4i8 sub_v4i8 (v4i8 a, v4i8 b)
return __builtin_mips_subu_qb (a, b);
}
void test_MIPS_DSP()
void test_MIPS_DSP ()
{
v4i8 v4i8_a,v4i8_b,v4i8_c,v4i8_r,v4i8_s;
v2q15 v2q15_a,v2q15_b,v2q15_c,v2q15_r,v2q15_s;
@ -162,7 +162,7 @@ void test_MIPS_DSP()
v2q15_r = add_v2q15 (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -171,14 +171,14 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_addq_s_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
q31_a = 0x70000000;
q31_b = 0x71234567;
q31_s = 0x7fffffff;
q31_r = __builtin_mips_addq_s_w (q31_a, q31_b);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
@ -187,7 +187,7 @@ void test_MIPS_DSP()
v4i8_r = add_v4i8 (v4i8_a, v4i8_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
@ -196,7 +196,7 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_addu_s_qb (v4i8_a, v4i8_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -205,7 +205,7 @@ void test_MIPS_DSP()
v2q15_r = sub_v2q15 (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x8000, 0x5678};
@ -214,14 +214,14 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_subq_s_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
q31_a = 0x70000000;
q31_b = 0x71234567;
q31_s = 0xfedcba99;
q31_r = __builtin_mips_subq_s_w (q31_a, q31_b);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
@ -230,7 +230,7 @@ void test_MIPS_DSP()
v4i8_r = sub_v4i8 (v4i8_a, v4i8_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
@ -239,34 +239,34 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_subu_s_qb (v4i8_a, v4i8_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
i32_a = 0xf5678900;
i32_b = 0x7abcdef0;
i32_s = 0x702467f0;
i32_r = __builtin_mips_addsc (i32_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
i32_a = 0x75678900;
i32_b = 0x7abcdef0;
i32_s = 0xf02467f1;
i32_r = __builtin_mips_addwc (i32_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
i32_a = 0;
i32_b = 0x00000901;
i32_s = 9;
i32_r = __builtin_mips_modsub (i32_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
i32_s = 0x1f4;
i32_r = __builtin_mips_raddu_w_qb (v4i8_a);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
v2q15_a = (v2q15) {0x8000, 0x8134};
@ -274,13 +274,13 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_absq_s_ph (v2q15_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
q31_a = (q31) 0x80000000;
q31_s = (q31) 0x7fffffff;
q31_r = __builtin_mips_absq_s_w (q31_a);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
v2q15_a = (v2q15) {0x9999, 0x5612};
@ -292,7 +292,7 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_precrq_qb_ph (v2q15_a, v2q15_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
q31_a = 0x12348678;
@ -304,7 +304,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_precrq_ph_w (q31_a, q31_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
q31_a = 0x12348678;
@ -316,7 +316,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_precrq_rs_ph_w (q31_a, q31_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x9999, 0x5612};
@ -328,7 +328,7 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_precrqu_s_qb_ph (v2q15_a, v2q15_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x3589, 0x4444};
@ -337,7 +337,7 @@ void test_MIPS_DSP()
else
q31_s = 0x35890000;
q31_r = __builtin_mips_preceq_w_phl (v2q15_a);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
v2q15_a = (v2q15) {0x3589, 0x4444};
@ -346,7 +346,7 @@ void test_MIPS_DSP()
else
q31_s = 0x44440000;
q31_r = __builtin_mips_preceq_w_phr (v2q15_a);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
@ -357,7 +357,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_precequ_ph_qbl (v4i8_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
@ -368,7 +368,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_precequ_ph_qbr (v4i8_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
@ -379,7 +379,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_precequ_ph_qbla (v4i8_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
@ -390,7 +390,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_precequ_ph_qbra (v4i8_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
@ -401,7 +401,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_preceu_ph_qbl (v4i8_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
@ -412,7 +412,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_preceu_ph_qbr (v4i8_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
@ -423,7 +423,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_preceu_ph_qbla (v4i8_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
@ -434,7 +434,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_preceu_ph_qbra (v4i8_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
@ -442,7 +442,7 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_shll_qb (v4i8_a, 2);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
@ -451,7 +451,7 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_shll_qb (v4i8_a, i32_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -459,7 +459,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_shll_ph (v2q15_a, 2);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -468,7 +468,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_shll_ph (v2q15_a, i32_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -476,7 +476,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, 2);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -485,20 +485,20 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, i32_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
q31_a = 0x70000000;
q31_s = 0x7fffffff;
q31_r = __builtin_mips_shll_s_w (q31_a, 2);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
q31_a = 0x70000000;
i32_b = 1;
q31_s = 0x7fffffff;
q31_r = __builtin_mips_shll_s_w (q31_a, i32_b);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
@ -506,7 +506,7 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_shrl_qb (v4i8_a, 2);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
@ -515,7 +515,7 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_shrl_qb (v4i8_a, i32_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -523,7 +523,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_shra_ph (v2q15_a, 2);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -532,7 +532,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_shra_ph (v2q15_a, i32_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -540,7 +540,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, 2);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -549,20 +549,20 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, i32_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
q31_a = 0x70000000;
q31_s = 0x1c000000;
q31_r = __builtin_mips_shra_r_w (q31_a, 2);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
q31_a = 0x70000004;
i32_b = 3;
q31_s = 0x0e000001;
q31_r = __builtin_mips_shra_r_w (q31_a, i32_b);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
@ -574,7 +574,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_muleu_s_ph_qbl (v4i8_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
@ -586,7 +586,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_muleu_s_ph_qbr (v4i8_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -595,21 +595,21 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_mulq_rs_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x8000, 0x8000};
v2q15_b = (v2q15) {0x8000, 0x8000};
q31_s = 0x7fffffff;
q31_r = __builtin_mips_muleq_s_w_phl (v2q15_a, v2q15_b);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
v2q15_a = (v2q15) {0x8000, 0x8000};
v2q15_b = (v2q15) {0x8000, 0x8000};
q31_s = 0x7fffffff;
q31_r = __builtin_mips_muleq_s_w_phr (v2q15_a, v2q15_b);
if(q31_r != q31_s)
if (q31_r != q31_s)
abort ();
#ifndef __mips64
@ -621,7 +621,7 @@ void test_MIPS_DSP()
else
a64_s = 0x222238d9;
a64_r = __builtin_mips_dpau_h_qbl (a64_a, v4i8_b, v4i8_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x22221111;
@ -632,7 +632,7 @@ void test_MIPS_DSP()
else
a64_s = 0x22222f27;
a64_r = __builtin_mips_dpau_h_qbr (a64_a, v4i8_b, v4i8_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x22221111;
@ -643,7 +643,7 @@ void test_MIPS_DSP()
else
a64_s = 0x2221e949;
a64_r = __builtin_mips_dpsu_h_qbl (a64_a, v4i8_b, v4i8_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x22221111;
@ -654,7 +654,7 @@ void test_MIPS_DSP()
else
a64_s = 0x2221f2fb;
a64_r = __builtin_mips_dpsu_h_qbr (a64_a, v4i8_b, v4i8_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x00001111;
@ -662,7 +662,7 @@ void test_MIPS_DSP()
v2q15_c = (v2q15) {0x8000, 0x1111};
a64_s = 0x8b877d00;
a64_r = __builtin_mips_dpaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x00001111;
@ -670,7 +670,7 @@ void test_MIPS_DSP()
v2q15_c = (v2q15) {0x8000, 0x1111};
a64_s = 0xffffffff7478a522LL;
a64_r = __builtin_mips_dpsq_s_w_ph (a64_a, v2q15_b, v2q15_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x00001111;
@ -681,7 +681,7 @@ void test_MIPS_DSP()
else
a64_s = 0x7478a520;
a64_r = __builtin_mips_mulsaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x00001111;
@ -689,7 +689,7 @@ void test_MIPS_DSP()
q31_c = 0x80000000;
a64_s = 0x7fffffffffffffffLL;
a64_r = __builtin_mips_dpaq_sa_l_w (a64_a, q31_b, q31_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x00001111;
@ -697,7 +697,7 @@ void test_MIPS_DSP()
q31_c = 0x80000000;
a64_s = 0x8000000000001112LL;
a64_r = __builtin_mips_dpsq_sa_l_w (a64_a, q31_b, q31_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x00001111;
@ -708,7 +708,7 @@ void test_MIPS_DSP()
else
a64_s = 0x80001110;
a64_r = __builtin_mips_maq_s_w_phl (a64_a, v2q15_b, v2q15_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x00001111;
@ -719,7 +719,7 @@ void test_MIPS_DSP()
else
a64_s = 0x1115;
a64_r = __builtin_mips_maq_s_w_phr (a64_a, v2q15_b, v2q15_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x00001111;
@ -730,7 +730,7 @@ void test_MIPS_DSP()
else
a64_s = 0x7fffffff;
a64_r = __builtin_mips_maq_sa_w_phl (a64_a, v2q15_b, v2q15_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x00001111;
@ -741,14 +741,14 @@ void test_MIPS_DSP()
else
a64_s = 0x1115;
a64_r = __builtin_mips_maq_sa_w_phr (a64_a, v2q15_b, v2q15_c);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
#endif
i32_a = 0x12345678;
i32_s = 0x00001e6a;
i32_r = __builtin_mips_bitrev (i32_a);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
i32_a = 0x00000208; // pos is 8, size is 4
@ -757,14 +757,14 @@ void test_MIPS_DSP()
i32_b = 0x87654321;
i32_s = 0x12345178;
i32_r = __builtin_mips_insv (i32_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
v4i8_s = (v4i8) {1, 1, 1, 1};
v4i8_r = __builtin_mips_repl_qb (1);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
i32_a = 99;
@ -772,14 +772,14 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_repl_qb (i32_a);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
v2q15_s = (v2q15) {30, 30};
v2q15_r = __builtin_mips_repl_ph (30);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
i32_a = 0x5612;
@ -787,7 +787,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_repl_ph (i32_a);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
@ -895,7 +895,7 @@ void test_MIPS_DSP()
v4i8_r = __builtin_mips_pick_qb (v4i8_a, v4i8_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if(r != s)
if (r != s)
abort ();
i32_a = 0x02000000; // cc: 0000 0010
@ -909,7 +909,7 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_pick_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
v2q15_a = (v2q15) {0x1234, 0x5678};
@ -921,60 +921,60 @@ void test_MIPS_DSP()
v2q15_r = __builtin_mips_packrl_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if(r != s)
if (r != s)
abort ();
#ifndef __mips64
a64_a = 0x1234567887654321LL;
i32_s = 0x88765432;
i32_r = __builtin_mips_extr_w (a64_a, 4);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
a64_a = 0x1234567887658321LL;
i32_s = 0x56788766;
i32_r = __builtin_mips_extr_r_w (a64_a, 16);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
a64_a = 0x12345677fffffff8LL;
i32_s = 0x7fffffff;
i32_r = __builtin_mips_extr_rs_w (a64_a, 4);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
a64_a = 0x1234567887658321LL;
i32_s = 0x7fff;
i32_r = __builtin_mips_extr_s_h (a64_a, 16);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
a64_a = 0x0000007887658321LL;
i32_b = 24;
i32_s = 0x7887;
i32_r = __builtin_mips_extr_s_h (a64_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
a64_a = 0x1234567887654321LL;
i32_b = 4;
i32_s = 0x88765432;
i32_r = __builtin_mips_extr_w (a64_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
a64_a = 0x1234567887658321LL;
i32_b = 16;
i32_s = 0x56788766;
i32_r = __builtin_mips_extr_r_w (a64_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
a64_a = 0x12345677fffffff8LL;
i32_b = 4;
i32_s = 0x7fffffff;
i32_r = __builtin_mips_extr_rs_w (a64_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
i32_a = 0x0000021f; // pos is 31
@ -982,7 +982,7 @@ void test_MIPS_DSP()
a64_a = 0x1234567887654321LL;
i32_s = 8;
i32_r = __builtin_mips_extp (a64_a, 3); // extract 4 bits
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
i32_a = 0x0000021f; // pos is 31
@ -991,7 +991,7 @@ void test_MIPS_DSP()
i32_b = 7; // size is 8. NOTE!! we should use 7
i32_s = 0x87;
i32_r = __builtin_mips_extp (a64_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
i32_a = 0x0000021f; // pos is 31
@ -999,7 +999,7 @@ void test_MIPS_DSP()
a64_a = 0x1234567887654321LL;
i32_s = 8;
i32_r = __builtin_mips_extpdp (a64_a, 3); // extract 4 bits
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
i32_s = 0x0000021b; // pos is 27
@ -1013,7 +1013,7 @@ void test_MIPS_DSP()
i32_b = 11; // size is 12. NOTE!!! We should use 11
i32_s = 0x876;
i32_r = __builtin_mips_extpdp (a64_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
i32_s = 0x00000213; // pos is 19
@ -1024,14 +1024,14 @@ void test_MIPS_DSP()
a64_a = 0x1234567887654321LL;
a64_s = 0x0012345678876543LL;
a64_r = __builtin_mips_shilo (a64_a, 8);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
a64_a = 0x1234567887654321LL;
i32_b = -16;
a64_s = 0x5678876543210000LL;
a64_r = __builtin_mips_shilo (a64_a, i32_b);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
i32_a = 0x0;
@ -1040,11 +1040,11 @@ void test_MIPS_DSP()
i32_b = 0x11112222;
a64_s = 0x8765432111112222LL;
a64_r = __builtin_mips_mthlip (a64_a, i32_b);
if(a64_r != a64_s)
if (a64_r != a64_s)
abort ();
i32_s = 32;
i32_r = __builtin_mips_rddsp (31);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
#endif
@ -1052,14 +1052,14 @@ void test_MIPS_DSP()
__builtin_mips_wrdsp (i32_a, 63);
i32_s = 0x03572428;
i32_r = __builtin_mips_rddsp (63);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
ptr_a = &array;
i32_b = 37;
i32_s = 37;
i32_r = __builtin_mips_lbux (ptr_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
ptr_a = &array;
@ -1069,7 +1069,7 @@ void test_MIPS_DSP()
else
i32_s = 0x2627;
i32_r = __builtin_mips_lhx (ptr_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
ptr_a = &array;
@ -1079,14 +1079,14 @@ void test_MIPS_DSP()
else
i32_s = 0x28292a2b;
i32_r = __builtin_mips_lwx (ptr_a, i32_b);
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
i32_a = 0x00000220; // pos is 32, size is 4
__builtin_mips_wrdsp (i32_a, 63);
i32_s = 1;
i32_r = __builtin_mips_bposge32 ();
if(i32_r != i32_s)
if (i32_r != i32_s)
abort ();
}

12
gcc/testsuite/gcc.target/mips/mips32-dspr2-type.c Normal file
View file

@ -0,0 +1,12 @@
/* Test MIPS32 DSP REV 2 instructions */
/* { dg-do compile } */
/* { dg-mips-options "-march=mips32r2 -mdspr2" } */
/* { dg-final { scan-assembler "\tmul.ph\t" } } */
typedef short v2hi __attribute__ ((vector_size(4)));
v2hi mul_v2hi (v2hi a, v2hi b)
{
return a * b;
}

541
gcc/testsuite/gcc.target/mips/mips32-dspr2.c Normal file
View file

@ -0,0 +1,541 @@
/* Test MIPS32 DSP REV 2 instructions */
/* { dg-do run { target mipsisa32r2*-*-* } } */
/* { dg-mips-options "-march=mips32r2 -mdspr2 -O2" } */
typedef signed char v4q7 __attribute__ ((vector_size(4)));
typedef signed char v4i8 __attribute__ ((vector_size(4)));
typedef short v2q15 __attribute__ ((vector_size(4)));
typedef short v2i16 __attribute__ ((vector_size(4)));
typedef int q31;
typedef int i32;
typedef unsigned int ui32;
typedef long long a64;
void abort (void);
void test_MIPS_DSPR2 (void);
int little_endian;
int main ()
{
union { long long ll; int i[2]; } endianness_test;
endianness_test.ll = 1;
little_endian = endianness_test.i[0];
test_MIPS_DSPR2 ();
return 0;
}
void test_MIPS_DSPR2 ()
{
v4q7 v4q7_a,v4q7_b,v4q7_c,v4q7_r,v4q7_s;
v4i8 v4i8_a,v4i8_b,v4i8_c,v4i8_r,v4i8_s;
v2q15 v2q15_a,v2q15_b,v2q15_c,v2q15_r,v2q15_s;
v2i16 v2i16_a,v2i16_b,v2i16_c,v2i16_r,v2i16_s;
q31 q31_a,q31_b,q31_c,q31_r,q31_s;
i32 i32_a,i32_b,i32_c,i32_r,i32_s;
ui32 ui32_a,ui32_b,ui32_c,ui32_r,ui32_s;
a64 a64_a,a64_b,a64_c,a64_r,a64_s;
int r,s;
v4q7_a = (v4i8) {0x81, 0xff, 0x80, 0x23};
v4q7_s = (v4i8) {0x7f, 0x01, 0x7f, 0x23};
v4q7_r = __builtin_mips_absq_s_qb (v4q7_a);
r = (int) v4q7_r;
s = (int) v4q7_s;
if (r != s)
abort ();
v2i16_a = (v2i16) {0xffff, 0x2468};
v2i16_b = (v2i16) {0x1234, 0x1111};
v2i16_s = (v2i16) {0x1233, 0x3579};
v2i16_r = __builtin_mips_addu_ph (v2i16_a, v2i16_b);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
v2i16_a = (v2i16) {0xffff, 0x2468};
v2i16_b = (v2i16) {0x1234, 0x1111};
v2i16_s = (v2i16) {0xffff, 0x3579};
v2i16_r = __builtin_mips_addu_s_ph (v2i16_a, v2i16_b);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
v4i8_a = (v4i8) {0x11, 0x22, 0x33, 0xff};
v4i8_b = (v4i8) {0x11, 0x33, 0x99, 0xff};
v4i8_s = (v4i8) {0x11, 0x2a, 0x66, 0xff};
v4i8_r = __builtin_mips_adduh_qb (v4i8_a, v4i8_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if (r != s)
abort ();
v4i8_a = (v4i8) {0x11, 0x22, 0x33, 0xff};
v4i8_b = (v4i8) {0x11, 0x33, 0x99, 0xff};
v4i8_s = (v4i8) {0x11, 0x2b, 0x66, 0xff};
v4i8_r = __builtin_mips_adduh_r_qb (v4i8_a, v4i8_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if (r != s)
abort ();
i32_a = 0x12345678;
i32_b = 0x87654321;
i32_s = 0x56784321;
i32_r = __builtin_mips_append (i32_a, i32_b, 16);
if (i32_r != i32_s)
abort ();
i32_a = 0x12345678;
i32_b = 0x87654321;
i32_s = 0x78876543;
i32_r = __builtin_mips_balign (i32_a, i32_b, 3);
if (i32_r != i32_s)
abort ();
__builtin_mips_wrdsp (0, 63);
v4i8_a = (v4i8) {0x11, 0x22, 0x33, 0x44};
v4i8_b = (v4i8) {0x11, 0x33, 0x33, 0x44};
if (little_endian)
i32_s = 0xd;
else
i32_s = 0xb;
i32_r = __builtin_mips_cmpgdu_eq_qb (v4i8_a, v4i8_b);
if (i32_r != i32_s)
abort ();
i32_r = __builtin_mips_rddsp (16);
if (little_endian)
i32_s = 0x0d000000;
else
i32_s = 0x0b000000;
if (i32_r != i32_s)
abort ();
__builtin_mips_wrdsp (0, 63);
v4i8_a = (v4i8) {0x11, 0x22, 0x33, 0x44};
v4i8_b = (v4i8) {0x11, 0x33, 0x33, 0x44};
if (little_endian)
i32_s = 0x2;
else
i32_s = 0x4;
i32_r = __builtin_mips_cmpgdu_lt_qb (v4i8_a, v4i8_b);
if (i32_r != i32_s)
abort ();
i32_r = __builtin_mips_rddsp (16);
if (little_endian)
i32_s = 0x02000000;
else
i32_s = 0x04000000;
if (i32_r != i32_s)
abort ();
__builtin_mips_wrdsp (0, 63);
v4i8_a = (v4i8) {0x11, 0x22, 0x33, 0x54};
v4i8_b = (v4i8) {0x11, 0x33, 0x33, 0x44};
if (little_endian)
i32_s = 0x7;
else
i32_s = 0xe;
i32_r = __builtin_mips_cmpgdu_le_qb (v4i8_a, v4i8_b);
if (i32_r != i32_s)
abort ();
i32_r = __builtin_mips_rddsp (16);
if (little_endian)
i32_s = 0x07000000;
else
i32_s = 0x0e000000;
if (i32_r != i32_s)
abort ();
#ifndef __mips64
a64_a = 0x12345678;
v2i16_b = (v2i16) {0xffff, 0x1555};
v2i16_c = (v2i16) {0x1234, 0x3322};
a64_s = 0x1677088e;
a64_r = __builtin_mips_dpa_w_ph (a64_a, v2i16_b, v2i16_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0x12345678;
v2i16_b = (v2i16) {0xffff, 0x1555};
v2i16_c = (v2i16) {0x1234, 0x3322};
a64_s = 0x0df1a462;
a64_r = __builtin_mips_dps_w_ph (a64_a, v2i16_b, v2i16_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0x12345678;
i32_b = 0x80000000;
i32_c = 0x11112222;
a64_s = 0xF7776EEF12345678LL;
a64_r = __builtin_mips_madd (a64_a, i32_b, i32_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0x12345678;
ui32_b = 0x80000000;
ui32_c = 0x11112222;
a64_s = 0x0888911112345678LL;
a64_r = __builtin_mips_maddu (a64_a, ui32_b, ui32_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0x12345678;
i32_b = 0x80000000;
i32_c = 0x11112222;
a64_s = 0x0888911112345678LL;
a64_r = __builtin_mips_msub (a64_a, i32_b, i32_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0x12345678;
ui32_b = 0x80000000;
ui32_c = 0x11112222;
a64_s = 0xF7776EEF12345678LL;
a64_r = __builtin_mips_msubu (a64_a, ui32_b, ui32_c);
if (a64_r != a64_s)
abort ();
#endif
v2i16_a = (v2i16) {0xffff, 0x2468};
v2i16_b = (v2i16) {0x1234, 0x1111};
v2i16_s = (v2i16) {0xedcc, 0x52e8};
v2i16_r = __builtin_mips_mul_ph (v2i16_a, v2i16_b);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
v2i16_a = (v2i16) {0x8000, 0x7fff};
v2i16_b = (v2i16) {0x1234, 0x1111};
v2i16_s = (v2i16) {0x8000, 0x7fff};
v2i16_r = __builtin_mips_mul_s_ph (v2i16_a, v2i16_b);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
q31_a = 0x80000000;
q31_b = 0x80000000;
q31_s = 0x7fffffff;
q31_r = __builtin_mips_mulq_rs_w (q31_a, q31_b);
if (q31_r != q31_s)
abort ();
v2q15_a = (v2q15) {0xffff, 0x8000};
v2q15_b = (v2q15) {0x1111, 0x8000};
v2q15_s = (v2q15) {0xffff, 0x7fff};
v2q15_r = __builtin_mips_mulq_s_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if (r != s)
abort ();
q31_a = 0x00000002;
q31_b = 0x80000000;
q31_s = 0xfffffffe;
q31_r = __builtin_mips_mulq_s_w (q31_a, q31_b);
if (q31_r != q31_s)
abort ();
#ifndef __mips64
a64_a = 0x19848419;
v2i16_b = (v2i16) {0xffff, 0x8000};
v2i16_c = (v2i16) {0x1111, 0x8000};
if (little_endian)
a64_s = 0x5984952a;
else
a64_s = 0xffffffffd9847308LL;
a64_r = __builtin_mips_mulsa_w_ph (a64_a, v2i16_b, v2i16_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
i32_a = 0x80000000;
i32_b = 0x11112222;
a64_s = 0xF7776EEF00000000LL;
a64_r = __builtin_mips_mult (i32_a, i32_b);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
ui32_a = 0x80000000;
ui32_b = 0x11112222;
a64_s = 0x888911100000000LL;
a64_r = __builtin_mips_multu (ui32_a, ui32_b);
if (a64_r != a64_s)
abort ();
#endif
v2i16_a = (v2i16) {0x1234, 0x5678};
v2i16_b = (v2i16) {0x2233, 0x5566};
if (little_endian)
v4i8_s = (v4i8) {0x33, 0x66, 0x34, 0x78};
else
v4i8_s = (v4i8) {0x34, 0x78, 0x33, 0x66};
v4i8_r = __builtin_mips_precr_qb_ph (v2i16_a, v2i16_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if (r != s)
abort ();
i32_a = 0x12345678;
i32_b = 0x33334444;
if (little_endian)
v2i16_s = (v2i16) {0x3444, 0x4567};
else
v2i16_s = (v2i16) {0x4567, 0x3444};
v2i16_r = __builtin_mips_precr_sra_ph_w (i32_a, i32_b, 4);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
i32_a = 0x12345678;
i32_b = 0x33334444;
if (little_endian)
v2i16_s = (v2i16) {0x3444, 0x4568};
else
v2i16_s = (v2i16) {0x4568, 0x3444};
v2i16_r = __builtin_mips_precr_sra_r_ph_w (i32_a, i32_b, 4);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
i32_a = 0x12345678;
i32_b = 0x87654321;
i32_s = 0x43211234;
i32_r = __builtin_mips_prepend (i32_a, i32_b, 16);
if (i32_r != i32_s)
abort ();
v4i8_a = (v4i8) {0x12, 0x45, 0x77, 0x99};
v4i8_s = (v4i8) {0x9, 0x22, 0x3b, 0xcc};
v4i8_r = __builtin_mips_shra_qb (v4i8_a, 1);
r = (int) v4i8_r;
s = (int) v4i8_s;
if (r != s)
abort ();
v4i8_a = (v4i8) {0x12, 0x45, 0x77, 0x99};
v4i8_s = (v4i8) {0x9, 0x23, 0x3c, 0xcd};
v4i8_r = __builtin_mips_shra_r_qb (v4i8_a, 1);
r = (int) v4i8_r;
s = (int) v4i8_s;
if (r != s)
abort ();
i32_b = 1;
v4i8_a = (v4i8) {0x12, 0x45, 0x77, 0x99};
v4i8_s = (v4i8) {0x9, 0x22, 0x3b, 0xcc};
v4i8_r = __builtin_mips_shra_qb (v4i8_a, i32_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if (r != s)
abort ();
i32_b = 1;
v4i8_a = (v4i8) {0x12, 0x45, 0x77, 0x99};
v4i8_s = (v4i8) {0x9, 0x23, 0x3c, 0xcd};
v4i8_r = __builtin_mips_shra_r_qb (v4i8_a, i32_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if (r != s)
abort ();
v2i16_a = (v2i16) {0x1357, 0x2468};
v2i16_s = (v2i16) {0x0135, 0x0246};
v2i16_r = __builtin_mips_shrl_ph (v2i16_a, 4);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
i32_b = 8;
v2i16_a = (v2i16) {0x1357, 0x2468};
v2i16_s = (v2i16) {0x0013, 0x0024};
v2i16_r = __builtin_mips_shrl_ph (v2i16_a, i32_b);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
v2i16_a = (v2i16) {0x1357, 0x4455};
v2i16_b = (v2i16) {0x3333, 0x4444};
v2i16_s = (v2i16) {0xe024, 0x0011};
v2i16_r = __builtin_mips_subu_ph (v2i16_a, v2i16_b);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
v2i16_a = (v2i16) {0x1357, 0x4455};
v2i16_b = (v2i16) {0x3333, 0x4444};
v2i16_s = (v2i16) {0x0000, 0x0011};
v2i16_r = __builtin_mips_subu_s_ph (v2i16_a, v2i16_b);
r = (int) v2i16_r;
s = (int) v2i16_s;
if (r != s)
abort ();
v4i8_a = (v4i8) {0x33 ,0x44, 0x55, 0x66};
v4i8_b = (v4i8) {0x99 ,0x15, 0x85, 0xff};
v4i8_s = (v4i8) {0xcd ,0x17, 0xe8, 0xb3};
v4i8_r = __builtin_mips_subuh_qb (v4i8_a, v4i8_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if (r != s)
abort ();
v4i8_a = (v4i8) {0x33 ,0x44, 0x55, 0x66};
v4i8_b = (v4i8) {0x99 ,0x15, 0x85, 0xff};
v4i8_s = (v4i8) {0xcd ,0x18, 0xe8, 0xb4};
v4i8_r = __builtin_mips_subuh_r_qb (v4i8_a, v4i8_b);
r = (int) v4i8_r;
s = (int) v4i8_s;
if (r != s)
abort ();
v2q15_a = (v2q15) {0x3334, 0x4444};
v2q15_b = (v2q15) {0x1111, 0x2222};
v2q15_s = (v2q15) {0x2222, 0x3333};
v2q15_r = __builtin_mips_addqh_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if (r != s)
abort ();
v2q15_a = (v2q15) {0x3334, 0x4444};
v2q15_b = (v2q15) {0x1111, 0x2222};
v2q15_s = (v2q15) {0x2223, 0x3333};
v2q15_r = __builtin_mips_addqh_r_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if (r != s)
abort ();
q31_a = 0x11111112;
q31_b = 0x99999999;
q31_s = 0xd5555555;
q31_r = __builtin_mips_addqh_w (q31_a, q31_b);
if (q31_r != q31_s)
abort ();
q31_a = 0x11111112;
q31_b = 0x99999999;
q31_s = 0xd5555556;
q31_r = __builtin_mips_addqh_r_w (q31_a, q31_b);
if (q31_r != q31_s)
abort ();
v2q15_a = (v2q15) {0x3334, 0x4444};
v2q15_b = (v2q15) {0x1111, 0x2222};
v2q15_s = (v2q15) {0x1111, 0x1111};
v2q15_r = __builtin_mips_subqh_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if (r != s)
abort ();
v2q15_a = (v2q15) {0x3334, 0x4444};
v2q15_b = (v2q15) {0x1111, 0x2222};
v2q15_s = (v2q15) {0x1112, 0x1111};
v2q15_r = __builtin_mips_subqh_r_ph (v2q15_a, v2q15_b);
r = (int) v2q15_r;
s = (int) v2q15_s;
if (r != s)
abort ();
q31_a = 0x11111112;
q31_b = 0x99999999;
q31_s = 0x3bbbbbbc;
q31_r = __builtin_mips_subqh_w (q31_a, q31_b);
if (q31_r != q31_s)
abort ();
q31_a = 0x11111112;
q31_b = 0x99999999;
q31_s = 0x3bbbbbbd;
q31_r = __builtin_mips_subqh_r_w (q31_a, q31_b);
if (q31_r != q31_s)
abort ();
#ifndef __mips64
a64_a = 0x1111222212345678LL;
v2i16_b = (v2i16) {0x1, 0x2};
v2i16_c = (v2i16) {0x3, 0x4};
a64_s = 0x1111222212345682LL;
a64_r = __builtin_mips_dpax_w_ph (a64_a, v2i16_b, v2i16_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0x9999111112345678LL;
v2i16_b = (v2i16) {0x1, 0x2};
v2i16_c = (v2i16) {0x3, 0x4};
a64_s = 0x999911111234566eLL;
a64_r = __builtin_mips_dpsx_w_ph (a64_a, v2i16_b, v2i16_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0x70000000;
v2q15_b = (v2q15) {0x4000, 0x2000};
v2q15_c = (v2q15) {0x2000, 0x4000};
a64_s = 0x98000000;
a64_r = __builtin_mips_dpaqx_s_w_ph (a64_a, v2q15_b, v2q15_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0x70000000;
v2q15_b = (v2q15) {0x4000, 0x2000};
v2q15_c = (v2q15) {0x2000, 0x4000};
a64_s = 0x7fffffff;
a64_r = __builtin_mips_dpaqx_sa_w_ph (a64_a, v2q15_b, v2q15_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0x70000000;
v2q15_b = (v2q15) {0x4000, 0x2000};
v2q15_c = (v2q15) {0x2000, 0x4000};
a64_s = 0x48000000;
a64_r = __builtin_mips_dpsqx_s_w_ph (a64_a, v2q15_b, v2q15_c);
if (a64_r != a64_s)
abort ();
#endif
#ifndef __mips64
a64_a = 0xFFFFFFFF80000000LL;
v2q15_b = (v2q15) {0x4000, 0x2000};
v2q15_c = (v2q15) {0x2000, 0x4000};
a64_s = 0xFFFFFFFF80000000LL;
a64_r = __builtin_mips_dpsqx_sa_w_ph (a64_a, v2q15_b, v2q15_c);
if (a64_r != a64_s)
abort ();
#endif
}