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Revert "[PATCH 1/2] RISC-V:Add intrinsic support for the CMOs extensions"

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This reverts commit d2c8548e0c.
This commit is contained in:
Jeff Law 2025-01-21 16:21:44 -07:00
parent d4a1a63fc4
commit 3f641a8f1d
2 changed files with 1 additions and 85 deletions
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2
gcc/config.gcc
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@ -555,7 +555,7 @@ riscv*)
extra_objs="${extra_objs} riscv-vector-builtins.o riscv-vector-builtins-shapes.o riscv-vector-builtins-bases.o sifive-vector-builtins-bases.o"
extra_objs="${extra_objs} thead.o riscv-target-attr.o riscv-zicfilp.o"
d_target_objs="riscv-d.o"
extra_headers="riscv_vector.h riscv_crypto.h riscv_bitmanip.h riscv_th_vector.h riscv_cmo.h sifive_vector.h"
extra_headers="riscv_vector.h riscv_crypto.h riscv_bitmanip.h riscv_th_vector.h sifive_vector.h"
target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.cc"
target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.h"
;;

84
gcc/config/riscv/riscv_cmo.h
View file

@ -1,84 +0,0 @@
/* RISC-V CMO Extension intrinsics include file.
Copyright (C) 2024-2025 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
Under Section 7 of GPL version 3, you are granted additional
permissions described in the GCC Runtime Library Exception, version
3.1, as published by the Free Software Foundation.
You should have received a copy of the GNU General Public License and
a copy of the GCC Runtime Library Exception along with this program;
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
#ifndef __RISCV_CMO_H
#define __RISCV_CMO_H
#if defined (__riscv_zicbom)
extern __inline void
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
__riscv_cmo_clean (void *addr)
{
__builtin_riscv_zicbom_cbo_clean (addr);
}
extern __inline void
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
__riscv_cmo_flush (void *addr)
{
__builtin_riscv_zicbom_cbo_flush (addr);
}
extern __inline void
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
__riscv_cmo_inval (void *addr)
{
__builtin_riscv_zicbom_cbo_inval (addr);
}
#endif // __riscv_zicbom
#if defined (__riscv_zicbop)
# define rnum 1
extern __inline void
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
__riscv_cmo_prefetch (void *addr, const int vs1, const int vs2)
{
__builtin_prefetch (addr,vs1,vs2);
}
extern __inline int
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
__riscv_cmo_prefetchi ()
{
return __builtin_riscv_zicbop_cbo_prefetchi (rnum);
}
#endif // __riscv_zicbop
#if defined (__riscv_zicboz)
extern __inline void
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
__riscv_cmo_zero (void *addr)
{
__builtin_riscv_zicboz_cbo_zero (addr);
}
#endif // __riscv_zicboz
#endif // __RISCV_CMO_H