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[nvptx] Use bit-bucket operand for atom insns

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For an atomic fetch operation that doesn't use the result:
...
  __atomic_fetch_add (p64, v64, MEMMODEL_RELAXED);
...
we currently emit:
...
  atom.add.u64 %r26, [%r25], %r27;
...

Detect the REG_UNUSED reg-note for %r26, and emit instead:
...
  atom.add.u64 _, [%r25], %r27;
...

Likewise for all atom insns.

Tested on nvptx.

gcc/ChangeLog:

2022-03-07  Tom de Vries  <tdevries@suse.de>

	PR target/104815
	* config/nvptx/nvptx.cc (nvptx_print_operand): Handle 'x' operand
	modifier.
	* config/nvptx/nvptx.md: Use %x0 destination operand in atom insns.

gcc/testsuite/ChangeLog:

2022-03-07  Tom de Vries  <tdevries@suse.de>

	PR target/104815
	* gcc.target/nvptx/atomic-bit-bucket-dest.c: New test.
This commit is contained in:
Tom de Vries 2022-03-07 14:23:03 +01:00
parent 248bbcb2c3
commit 3ebcc053a4
3 changed files with 50 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
gcc/config/nvptx/nvptx.cc
View file

@ -2835,7 +2835,8 @@ nvptx_mem_maybe_shared_p (const_rtx x)
S -- print a shuffle kind specified by CONST_INT
t -- print a type opcode suffix, promoting QImode to 32 bits
T -- print a type size in bits
u -- print a type opcode suffix without promotions. */
u -- print a type opcode suffix without promotions.
x -- print a destination operand that may also be a bit bucket. */
static void
nvptx_print_operand (FILE *file, rtx x, int code)
@ -2863,6 +2864,14 @@ nvptx_print_operand (FILE *file, rtx x, int code)
switch (code)
{
case 'x':
if (current_output_insn != NULL
&& find_reg_note (current_output_insn, REG_UNUSED, x) != NULL_RTX)
{
fputs ("_", file);
return;
}
goto common;
case 'B':
if (SYMBOL_REF_P (XEXP (x, 0)))
switch (SYMBOL_DATA_AREA (XEXP (x, 0)))

10
gcc/config/nvptx/nvptx.md
View file

@ -2050,7 +2050,7 @@
""
{
const char *t
= "%.\\tatom%A1.cas.b%T0\\t%0, %1, %2, %3;";
= "%.\\tatom%A1.cas.b%T0\\t%x0, %1, %2, %3;";
return nvptx_output_atomic_insn (t, operands, 1, 4);
}
[(set_attr "atomic" "true")])
@ -2076,7 +2076,7 @@
return "";
}
const char *t
= "%.\tatom%A1.exch.b%T0\t%0, %1, %2;";
= "%.\tatom%A1.exch.b%T0\t%x0, %1, %2;";
return nvptx_output_atomic_insn (t, operands, 1, 3);
}
[(set_attr "atomic" "true")])
@ -2166,7 +2166,7 @@
return "";
}
const char *t
= "%.\\tatom%A1.add%t0\\t%0, %1, %2;";
= "%.\\tatom%A1.add%t0\\t%x0, %1, %2;";
return nvptx_output_atomic_insn (t, operands, 1, 3);
}
[(set_attr "atomic" "true")])
@ -2196,7 +2196,7 @@
return "";
}
const char *t
= "%.\\tatom%A1.add%t0\\t%0, %1, %2;";
= "%.\\tatom%A1.add%t0\\t%x0, %1, %2;";
return nvptx_output_atomic_insn (t, operands, 1, 3);
}
[(set_attr "atomic" "true")])
@ -2226,7 +2226,7 @@
return "";
}
const char *t
= "%.\\tatom%A1.<logic>.b%T0\\t%0, %1, %2;";
= "%.\\tatom%A1.<logic>.b%T0\\t%x0, %1, %2;";
return nvptx_output_atomic_insn (t, operands, 1, 3);
}

35
gcc/testsuite/gcc.target/nvptx/atomic-bit-bucket-dest.c Normal file
View file

@ -0,0 +1,35 @@
/* { dg-do compile } */
/* { dg-options "-O2 -misa=sm_35" } */
enum memmodel
{
MEMMODEL_RELAXED = 0
};
unsigned long long int *p64;
unsigned long long int v64;
int
main()
{
__atomic_fetch_add (p64, v64, MEMMODEL_RELAXED);
__atomic_fetch_and (p64, v64, MEMMODEL_RELAXED);
__atomic_fetch_or (p64, v64, MEMMODEL_RELAXED);
__atomic_fetch_xor (p64, v64, MEMMODEL_RELAXED);
__atomic_exchange_n (p64, v64, MEMMODEL_RELAXED);
{
unsigned long long expected = v64;
__atomic_compare_exchange_n (p64, &expected, 0, 0, MEMMODEL_RELAXED,
MEMMODEL_RELAXED);
}
return 0;
}
/* { dg-final { scan-assembler-times "atom.add.u64\[\t \]+_," 1 } } */
/* { dg-final { scan-assembler-times "atom.and.b64\[\t \]+_," 1 } } */
/* { dg-final { scan-assembler-times "atom.or.b64\[\t \]+_," 1 } } */
/* { dg-final { scan-assembler-times "atom.xor.b64\[\t \]+_," 1 } } */
/* { dg-final { scan-assembler-times "atom.exch.b64\[\t \]+_," 1 } } */
/* { dg-final { scan-assembler-times "atom.cas.b64\[\t \]+_," 1 } } */