mips-opts.h: New.
* config/mips/mips-opts.h: New. * config/mips/mips.c (enum mips_r10k_cache_barrier_setting): Move to mips-opts.h. (mips_abi, mips_code_readable, mips_r10k_cache_barriee): Remove. (mips_handle_option): Don't handle OPT_mabi_, OPT_mcode_readable_ or OPT_mr10k_cache_barrier_ here. Access mips_cache_flush_func via opts pointer. * config/mips/mips.h (enum mips_code_readable_setting): Move to mips-opts.h. (mips_abi, mips_code_readable): Don't declare. * config/mips/mips.opt (config/mips/mips-opts.h): New HeaderInclude. (mabi=): Use Enum and Var. (mips_abi): New Enum and EnumValue entries. (mcode-readable=): Use Enum and Var. (mips_code_readable_setting): New Enum and EnumValue entries. (mr10k-cache-barrier=): Use Enum and Var. (mips_r10k_cache_barrier_setting): New Enum and EnumValue entries. From-SVN: r173338
This commit is contained in:
parent
6add7e946e
commit
3af42a7bac
5 changed files with 113 additions and 65 deletions
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@ -1,3 +1,24 @@
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2011-05-03 Joseph Myers <joseph@codesourcery.com>
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* config/mips/mips-opts.h: New.
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* config/mips/mips.c (enum mips_r10k_cache_barrier_setting): Move
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to mips-opts.h.
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(mips_abi, mips_code_readable, mips_r10k_cache_barriee): Remove.
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(mips_handle_option): Don't handle OPT_mabi_, OPT_mcode_readable_
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or OPT_mr10k_cache_barrier_ here. Access mips_cache_flush_func
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via opts pointer.
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* config/mips/mips.h (enum mips_code_readable_setting): Move to
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mips-opts.h.
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(mips_abi, mips_code_readable): Don't declare.
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* config/mips/mips.opt (config/mips/mips-opts.h): New
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HeaderInclude.
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(mabi=): Use Enum and Var.
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(mips_abi): New Enum and EnumValue entries.
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(mcode-readable=): Use Enum and Var.
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(mips_code_readable_setting): New Enum and EnumValue entries.
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(mr10k-cache-barrier=): Use Enum and Var.
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(mips_r10k_cache_barrier_setting): New Enum and EnumValue entries.
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2011-05-03 Jan Hubicka <jh@suse.cz>
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* cgraph.h (cgraph_node_set_def, varpool_node_set_def): Move out of GTY;
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39
gcc/config/mips/mips-opts.h
Normal file
39
gcc/config/mips/mips-opts.h
Normal file
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@ -0,0 +1,39 @@
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/* Definitions for option handling for MIPS.
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Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998
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1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011
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Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#ifndef MIPS_OPTS_H
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#define MIPS_OPTS_H
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/* Enumerates the setting of the -mcode-readable option. */
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enum mips_code_readable_setting {
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CODE_READABLE_NO,
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CODE_READABLE_PCREL,
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CODE_READABLE_YES
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};
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/* Enumerates the setting of the -mr10k-cache-barrier option. */
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enum mips_r10k_cache_barrier_setting {
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R10K_CACHE_BARRIER_NONE,
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R10K_CACHE_BARRIER_STORE,
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R10K_CACHE_BARRIER_LOAD_STORE
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};
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#endif
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@ -182,13 +182,6 @@ enum mips_address_type {
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ADDRESS_SYMBOLIC
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};
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/* Enumerates the setting of the -mr10k-cache-barrier option. */
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enum mips_r10k_cache_barrier_setting {
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R10K_CACHE_BARRIER_NONE,
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R10K_CACHE_BARRIER_STORE,
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R10K_CACHE_BARRIER_LOAD_STORE
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};
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/* Macros to create an enumeration identifier for a function prototype. */
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#define MIPS_FTYPE_NAME1(A, B) MIPS_##A##_FTYPE_##B
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#define MIPS_FTYPE_NAME2(A, B, C) MIPS_##A##_FTYPE_##B##_##C
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/* The architecture selected by -mipsN, or null if -mipsN wasn't used. */
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static const struct mips_cpu_info *mips_isa_option_info;
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/* Which ABI to use. */
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int mips_abi = MIPS_ABI_DEFAULT;
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/* Which cost information to use. */
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static const struct mips_rtx_cost_data *mips_cost;
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static int mips_base_align_jumps; /* align_jumps */
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static int mips_base_align_functions; /* align_functions */
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/* The -mcode-readable setting. */
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enum mips_code_readable_setting mips_code_readable = CODE_READABLE_YES;
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/* The -mr10k-cache-barrier setting. */
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static enum mips_r10k_cache_barrier_setting mips_r10k_cache_barrier;
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/* Index [M][R] is true if register R is allowed to hold a value of mode M. */
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bool mips_hard_regno_mode_ok[(int) MAX_MACHINE_MODE][FIRST_PSEUDO_REGISTER];
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switch (code)
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{
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case OPT_mabi_:
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if (strcmp (arg, "32") == 0)
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mips_abi = ABI_32;
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else if (strcmp (arg, "o64") == 0)
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mips_abi = ABI_O64;
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else if (strcmp (arg, "n32") == 0)
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mips_abi = ABI_N32;
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else if (strcmp (arg, "64") == 0)
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mips_abi = ABI_64;
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else if (strcmp (arg, "eabi") == 0)
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mips_abi = ABI_EABI;
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else
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return false;
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return true;
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case OPT_march_:
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case OPT_mtune_:
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return mips_parse_cpu (arg) != 0;
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return mips_isa_option_info != 0;
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case OPT_mno_flush_func:
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mips_cache_flush_func = NULL;
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return true;
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case OPT_mcode_readable_:
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if (strcmp (arg, "yes") == 0)
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mips_code_readable = CODE_READABLE_YES;
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else if (strcmp (arg, "pcrel") == 0)
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mips_code_readable = CODE_READABLE_PCREL;
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else if (strcmp (arg, "no") == 0)
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mips_code_readable = CODE_READABLE_NO;
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else
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return false;
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return true;
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case OPT_mr10k_cache_barrier_:
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if (strcmp (arg, "load-store") == 0)
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mips_r10k_cache_barrier = R10K_CACHE_BARRIER_LOAD_STORE;
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else if (strcmp (arg, "store") == 0)
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mips_r10k_cache_barrier = R10K_CACHE_BARRIER_STORE;
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else if (strcmp (arg, "none") == 0)
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mips_r10k_cache_barrier = R10K_CACHE_BARRIER_NONE;
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else
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return false;
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opts->x_mips_cache_flush_func = NULL;
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return true;
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default:
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unsigned int tune_flags;
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};
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/* Enumerates the setting of the -mcode-readable option. */
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enum mips_code_readable_setting {
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CODE_READABLE_NO,
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CODE_READABLE_PCREL,
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CODE_READABLE_YES
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};
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#include "config/mips/mips-opts.h"
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/* Macros to silence warnings about numbers being signed in traditional
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C and unsigned in ISO C when compiled on 32-bit hosts. */
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extern enum processor mips_arch; /* which cpu to codegen for */
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extern enum processor mips_tune; /* which cpu to schedule for */
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extern int mips_isa; /* architectural level */
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extern int mips_abi; /* which ABI to use */
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extern const struct mips_cpu_info *mips_arch_info;
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extern const struct mips_cpu_info *mips_tune_info;
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extern bool mips_base_mips16;
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extern enum mips_code_readable_setting mips_code_readable;
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extern GTY(()) struct target_globals *mips16_globals;
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#endif
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; along with GCC; see the file COPYING3. If not see
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; <http://www.gnu.org/licenses/>.
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HeaderInclude
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config/mips/mips-opts.h
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EB
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Driver
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Driver
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mabi=
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Target RejectNegative Joined
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Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
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-mabi=ABI Generate code that conforms to the given ABI
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Enum
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Name(mips_abi) Type(int)
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Known MIPS ABIs (for use with the -mabi= option):
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EnumValue
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Enum(mips_abi) String(32) Value(ABI_32)
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EnumValue
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Enum(mips_abi) String(o64) Value(ABI_O64)
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EnumValue
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Enum(mips_abi) String(n32) Value(ABI_N32)
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EnumValue
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Enum(mips_abi) String(64) Value(ABI_64)
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EnumValue
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Enum(mips_abi) String(eabi) Value(ABI_EABI)
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mabicalls
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Target Report Mask(ABICALLS)
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Generate code that can be used in SVR4-style dynamic objects
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Trap on integer divide by zero
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mcode-readable=
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Target RejectNegative Joined
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Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
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-mcode-readable=SETTING Specify when instructions are allowed to access code
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Enum
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Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
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Valid arguments to -mcode-readable=:
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EnumValue
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Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
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EnumValue
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Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
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EnumValue
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Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
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mdivide-breaks
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Target Report RejectNegative Mask(DIVIDE_BREAKS)
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Use branch-and-break sequences to check for integer divide by zero
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Use paired-single floating-point instructions
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mr10k-cache-barrier=
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Target Joined RejectNegative
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Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
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-mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
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Enum
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Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
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Valid arguments to -mr10k-cache-barrier=:
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EnumValue
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Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
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EnumValue
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Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
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EnumValue
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Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
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mrelax-pic-calls
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Target Report Mask(RELAX_PIC_CALLS)
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Try to allow the linker to turn PIC calls into direct calls
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