re PR target/49868 (Implement named address space to place/access data in flash memory)
PR target/49868 Rename __pgm to __flash. Rename __pgm1 to __flash1. Rename __pgm2 to __flash2. Rename __pgm3 to __flash3. Rename __pgm4 to __flash4. Rename __pgm5 to __flash5. Rename __pgmx to __memx. * doc/extend.texi (AVR Named Address Spaces) Rename address space names as indicated above. * config/avr/avr.c (avr_addrspace): Ditto. * config/avr/avr-protos.h (avr_mem_pgmx_p): Rename to avr_mem_memx_p. (avr_mem_pgm_p): Rename to avr_mem_flash_p. * config/avr/predicates.md: Ditto. * config/avr/avr.c Ditto, and (avr_decl_pgmx_p): Rename to avr_decl_memx_p. (avr_decl_pgm_p): Rename to avr_decl_flash_p. * config/avr/avr.h (ADDR_SPACE_PGM): Rename to ADDR_SPACE_FLASH. (ADDR_SPACE_PGM1): Rename to ADDR_SPACE_FLASH1. (ADDR_SPACE_PGM2): Rename to ADDR_SPACE_FLASH2. (ADDR_SPACE_PGM3): Rename to ADDR_SPACE_FLASH3. (ADDR_SPACE_PGM4): Rename to ADDR_SPACE_FLASH4. (ADDR_SPACE_PGM5): Rename to ADDR_SPACE_FLASH5. (ADDR_SPACE_PGMX): Rename to ADDR_SPACE_MEMX. * config/avr/avr.c: Ditto. * config/avr/avr.md: Ditto. From-SVN: r183529
This commit is contained in:
Georg-Johann Lay
Georg-Johann Lay
parent
f5a5c89082
commit
3a840863c2
7 changed files with 135 additions and 103 deletions
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@ -1,3 +1,35 @@
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2012-01-25 Georg-Johann Lay <avr@gjlay.de>
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PR target/49868
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Rename __pgm to __flash.
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Rename __pgm1 to __flash1.
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Rename __pgm2 to __flash2.
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Rename __pgm3 to __flash3.
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Rename __pgm4 to __flash4.
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Rename __pgm5 to __flash5.
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Rename __pgmx to __memx.
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* doc/extend.texi (AVR Named Address Spaces)
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Rename address space names as indicated above.
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* config/avr/avr.c (avr_addrspace): Ditto.
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* config/avr/avr-protos.h
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(avr_mem_pgmx_p): Rename to avr_mem_memx_p.
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(avr_mem_pgm_p): Rename to avr_mem_flash_p.
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* config/avr/predicates.md: Ditto.
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* config/avr/avr.c Ditto, and
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(avr_decl_pgmx_p): Rename to avr_decl_memx_p.
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(avr_decl_pgm_p): Rename to avr_decl_flash_p.
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* config/avr/avr.h (ADDR_SPACE_PGM): Rename to ADDR_SPACE_FLASH.
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(ADDR_SPACE_PGM1): Rename to ADDR_SPACE_FLASH1.
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(ADDR_SPACE_PGM2): Rename to ADDR_SPACE_FLASH2.
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(ADDR_SPACE_PGM3): Rename to ADDR_SPACE_FLASH3.
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(ADDR_SPACE_PGM4): Rename to ADDR_SPACE_FLASH4.
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(ADDR_SPACE_PGM5): Rename to ADDR_SPACE_FLASH5.
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(ADDR_SPACE_PGMX): Rename to ADDR_SPACE_MEMX.
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* config/avr/avr.c: Ditto.
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* config/avr/avr.md: Ditto.
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2012-01-25 Jason Merrill <jason@redhat.com>
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PR c++/51992
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@ -120,8 +120,8 @@ extern reg_class_t avr_mode_code_base_reg_class (enum machine_mode, addr_space_t
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extern bool avr_regno_mode_code_ok_for_base_p (int, enum machine_mode, addr_space_t, RTX_CODE, RTX_CODE);
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extern rtx avr_incoming_return_addr_rtx (void);
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extern rtx avr_legitimize_reload_address (rtx*, enum machine_mode, int, int, int, int, rtx (*)(rtx,int));
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extern bool avr_mem_pgm_p (rtx);
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extern bool avr_mem_pgmx_p (rtx);
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extern bool avr_mem_flash_p (rtx);
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extern bool avr_mem_memx_p (rtx);
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extern bool avr_load_libgcc_p (rtx);
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extern bool avr_xload_libgcc_p (enum machine_mode);
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#endif /* RTX_CODE */
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@ -83,13 +83,13 @@
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const avr_addrspace_t avr_addrspace[] =
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{
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{ ADDR_SPACE_RAM, 0, 2, "" , 0 },
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{ ADDR_SPACE_PGM, 1, 2, "__pgm", 0 },
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{ ADDR_SPACE_PGM1, 1, 2, "__pgm1", 1 },
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{ ADDR_SPACE_PGM2, 1, 2, "__pgm2", 2 },
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{ ADDR_SPACE_PGM3, 1, 2, "__pgm3", 3 },
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{ ADDR_SPACE_PGM4, 1, 2, "__pgm4", 4 },
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{ ADDR_SPACE_PGM5, 1, 2, "__pgm5", 5 },
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{ ADDR_SPACE_PGMX, 1, 3, "__pgmx", 0 },
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{ ADDR_SPACE_FLASH, 1, 2, "__flash", 0 },
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{ ADDR_SPACE_FLASH1, 1, 2, "__flash1", 1 },
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{ ADDR_SPACE_FLASH2, 1, 2, "__flash2", 2 },
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{ ADDR_SPACE_FLASH3, 1, 2, "__flash3", 3 },
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{ ADDR_SPACE_FLASH4, 1, 2, "__flash4", 4 },
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{ ADDR_SPACE_FLASH5, 1, 2, "__flash5", 5 },
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{ ADDR_SPACE_MEMX, 1, 3, "__memx", 0 },
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{ 0 , 0, 0, NULL, 0 }
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};
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@ -177,7 +177,7 @@ const struct mcu_type_s *avr_current_device;
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static GTY(()) section *progmem_swtable_section;
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/* Unnamed sections associated to __attribute__((progmem)) aka. PROGMEM
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or to address space __pgm*. */
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or to address space __flash*. */
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static GTY(()) section *progmem_section[6];
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/* Condition for insns/expanders from avr-dimode.md. */
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@ -485,7 +485,7 @@ avr_scalar_mode_supported_p (enum machine_mode mode)
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/* Return TRUE if DECL is a VAR_DECL located in Flash and FALSE, otherwise. */
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static bool
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avr_decl_pgm_p (tree decl)
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avr_decl_flash_p (tree decl)
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{
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if (TREE_CODE (decl) != VAR_DECL
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|| TREE_TYPE (decl) == error_mark_node)
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@ -501,7 +501,7 @@ avr_decl_pgm_p (tree decl)
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address space and FALSE, otherwise. */
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static bool
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avr_decl_pgmx_p (tree decl)
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avr_decl_memx_p (tree decl)
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{
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if (TREE_CODE (decl) != VAR_DECL
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|| TREE_TYPE (decl) == error_mark_node)
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@ -509,14 +509,14 @@ avr_decl_pgmx_p (tree decl)
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return false;
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}
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return (ADDR_SPACE_PGMX == TYPE_ADDR_SPACE (TREE_TYPE (decl)));
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return (ADDR_SPACE_MEMX == TYPE_ADDR_SPACE (TREE_TYPE (decl)));
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}
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/* Return TRUE if X is a MEM rtx located in Flash and FALSE, otherwise. */
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bool
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avr_mem_pgm_p (rtx x)
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avr_mem_flash_p (rtx x)
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{
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return (MEM_P (x)
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&& !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x)));
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@ -527,10 +527,10 @@ avr_mem_pgm_p (rtx x)
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address space and FALSE, otherwise. */
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bool
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avr_mem_pgmx_p (rtx x)
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avr_mem_memx_p (rtx x)
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{
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return (MEM_P (x)
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&& ADDR_SPACE_PGMX == MEM_ADDR_SPACE (x));
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&& ADDR_SPACE_MEMX == MEM_ADDR_SPACE (x));
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}
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@ -2432,7 +2432,7 @@ avr_load_libgcc_p (rtx op)
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return (n_bytes > 2
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&& !AVR_HAVE_LPMX
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&& avr_mem_pgm_p (op));
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&& avr_mem_flash_p (op));
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}
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/* Return true if a value of mode MODE is read by __xload_* function. */
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@ -2802,8 +2802,8 @@ output_movqi (rtx insn, rtx operands[], int *l)
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rtx src = operands[1];
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int *real_l = l;
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if (avr_mem_pgm_p (src)
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|| avr_mem_pgm_p (dest))
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if (avr_mem_flash_p (src)
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|| avr_mem_flash_p (dest))
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{
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return avr_out_lpm (insn, operands, real_l);
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}
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@ -2853,8 +2853,8 @@ output_movhi (rtx insn, rtx xop[], int *plen)
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gcc_assert (GET_MODE_SIZE (GET_MODE (dest)) == 2);
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if (avr_mem_pgm_p (src)
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|| avr_mem_pgm_p (dest))
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if (avr_mem_flash_p (src)
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|| avr_mem_flash_p (dest))
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{
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return avr_out_lpm (insn, xop, plen);
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}
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@ -3424,8 +3424,8 @@ output_movsisf (rtx insn, rtx operands[], int *l)
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rtx src = operands[1];
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int *real_l = l;
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if (avr_mem_pgm_p (src)
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|| avr_mem_pgm_p (dest))
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if (avr_mem_flash_p (src)
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|| avr_mem_flash_p (dest))
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{
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return avr_out_lpm (insn, operands, real_l);
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}
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@ -3725,8 +3725,8 @@ avr_out_movpsi (rtx insn, rtx *op, int *plen)
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rtx dest = op[0];
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rtx src = op[1];
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if (avr_mem_pgm_p (src)
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|| avr_mem_pgm_p (dest))
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if (avr_mem_flash_p (src)
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|| avr_mem_flash_p (dest))
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{
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return avr_out_lpm (insn, op, plen);
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}
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@ -6810,10 +6810,10 @@ avr_progmem_p (tree decl, tree attributes)
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if (TREE_CODE (decl) != VAR_DECL)
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return 0;
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if (avr_decl_pgmx_p (decl))
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if (avr_decl_memx_p (decl))
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return 2;
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if (avr_decl_pgm_p (decl))
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if (avr_decl_flash_p (decl))
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return 1;
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if (NULL_TREE
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@ -6878,8 +6878,8 @@ avr_nonconst_pointer_addrspace (tree typ)
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}
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/* Sanity check NODE so that all pointers targeting address space AS1
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go along with CONST qualifier. Writing to this address space should
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/* Sanity check NODE so that all pointers targeting non-generic addres spaces
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go along with CONST qualifier. Writing to these address spaces should
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be detected and complained about as early as possible. */
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static bool
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@ -7195,11 +7195,11 @@ avr_section_type_flags (tree decl, const char *name, int reloc)
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addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (decl));
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/* Attribute progmem puts data in generic address space.
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Set section flags as if it was in __pgm to get the right
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Set section flags as if it was in __flash to get the right
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section prefix in the remainder. */
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if (ADDR_SPACE_GENERIC_P (as))
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as = ADDR_SPACE_PGM;
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as = ADDR_SPACE_FLASH;
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flags |= as * SECTION_MACH_DEP;
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flags &= ~SECTION_WRITE;
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@ -7244,7 +7244,7 @@ avr_encode_section_info (tree decl, rtx rtl, int new_decl_p)
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patch address space. */
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if (-1 == avr_progmem_p (decl, DECL_ATTRIBUTES (decl)))
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as = ADDR_SPACE_PGM;
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as = ADDR_SPACE_FLASH;
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AVR_SYMBOL_SET_ADDR_SPACE (sym, as);
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}
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@ -9469,12 +9469,12 @@ avr_addr_space_legitimate_address_p (enum machine_mode mode, rtx x,
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case ADDR_SPACE_GENERIC:
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return avr_legitimate_address_p (mode, x, strict);
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case ADDR_SPACE_PGM:
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case ADDR_SPACE_PGM1:
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case ADDR_SPACE_PGM2:
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case ADDR_SPACE_PGM3:
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case ADDR_SPACE_PGM4:
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case ADDR_SPACE_PGM5:
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case ADDR_SPACE_FLASH:
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case ADDR_SPACE_FLASH1:
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case ADDR_SPACE_FLASH2:
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case ADDR_SPACE_FLASH3:
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case ADDR_SPACE_FLASH4:
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case ADDR_SPACE_FLASH5:
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switch (GET_CODE (x))
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{
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@ -9490,9 +9490,9 @@ avr_addr_space_legitimate_address_p (enum machine_mode mode, rtx x,
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break;
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}
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break; /* PGM */
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break; /* FLASH */
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case ADDR_SPACE_PGMX:
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case ADDR_SPACE_MEMX:
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if (REG_P (x))
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ok = (!strict
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&& can_create_pseudo_p());
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@ -9508,7 +9508,7 @@ avr_addr_space_legitimate_address_p (enum machine_mode mode, rtx x,
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&& REGNO (lo) == REG_Z);
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}
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break; /* PGMX */
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break; /* MEMX */
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}
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if (avr_log.legitimate_address_p)
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@ -9567,8 +9567,8 @@ avr_addr_space_convert (rtx src, tree type_from, tree type_to)
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/* Up-casting from 16-bit to 24-bit pointer. */
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if (as_from != ADDR_SPACE_PGMX
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&& as_to == ADDR_SPACE_PGMX)
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if (as_from != ADDR_SPACE_MEMX
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&& as_to == ADDR_SPACE_MEMX)
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{
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int msb;
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rtx sym = src;
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@ -9584,9 +9584,9 @@ avr_addr_space_convert (rtx src, tree type_from, tree type_to)
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address space. */
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if (SYMBOL_REF == GET_CODE (sym)
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&& ADDR_SPACE_PGM == AVR_SYMBOL_GET_ADDR_SPACE (sym))
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&& ADDR_SPACE_FLASH == AVR_SYMBOL_GET_ADDR_SPACE (sym))
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{
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as_from = ADDR_SPACE_PGM;
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as_from = ADDR_SPACE_FLASH;
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}
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/* Linearize memory: RAM has bit 23 set. */
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@ -9606,8 +9606,8 @@ avr_addr_space_convert (rtx src, tree type_from, tree type_to)
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/* Down-casting from 24-bit to 16-bit throws away the high byte. */
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if (as_from == ADDR_SPACE_PGMX
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&& as_to != ADDR_SPACE_PGMX)
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if (as_from == ADDR_SPACE_MEMX
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&& as_to != ADDR_SPACE_MEMX)
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{
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rtx new_src = gen_reg_rtx (Pmode);
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@ -9651,7 +9651,7 @@ avr_emit_movmemhi (rtx *xop)
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rtx loop_reg, addr0, addr1, a_src, a_dest, insn, xas, reg_x;
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rtx a_hi8 = NULL_RTX;
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if (avr_mem_pgm_p (xop[0]))
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if (avr_mem_flash_p (xop[0]))
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return false;
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if (!CONST_INT_P (xop[2]))
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@ -9666,7 +9666,7 @@ avr_emit_movmemhi (rtx *xop)
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if (PSImode == GET_MODE (a_src))
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{
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gcc_assert (as == ADDR_SPACE_PGMX);
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gcc_assert (as == ADDR_SPACE_MEMX);
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loop_mode = (count < 0x100) ? QImode : HImode;
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loop_reg = gen_rtx_REG (loop_mode, 24);
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@ -9687,7 +9687,7 @@ avr_emit_movmemhi (rtx *xop)
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}
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else if (!ADDR_SPACE_GENERIC_P (as))
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{
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as = ADDR_SPACE_PGM;
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as = ADDR_SPACE_FLASH;
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}
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addr1 = a_src;
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@ -9718,7 +9718,7 @@ avr_emit_movmemhi (rtx *xop)
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gcc_assert (TMP_REGNO == LPM_REGNO);
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if (as != ADDR_SPACE_PGMX)
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if (as != ADDR_SPACE_MEMX)
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{
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/* Load instruction ([E]LPM or LD) is known at compile time:
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Do the copy-loop inline. */
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@ -9792,7 +9792,7 @@ avr_out_movmem (rtx insn ATTRIBUTE_UNUSED, rtx *xop, int *plen)
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avr_asm_len ("ld %6,%a1+", xop, plen, 1);
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break;
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case ADDR_SPACE_PGM:
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case ADDR_SPACE_FLASH:
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if (AVR_HAVE_LPMX)
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avr_asm_len ("lpm %6,%a1+", xop, plen, 1);
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@ -9801,11 +9801,11 @@ avr_out_movmem (rtx insn ATTRIBUTE_UNUSED, rtx *xop, int *plen)
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"adiw %1,1", xop, plen, 2);
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break;
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case ADDR_SPACE_PGM1:
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case ADDR_SPACE_PGM2:
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case ADDR_SPACE_PGM3:
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case ADDR_SPACE_PGM4:
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case ADDR_SPACE_PGM5:
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case ADDR_SPACE_FLASH1:
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case ADDR_SPACE_FLASH2:
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case ADDR_SPACE_FLASH3:
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case ADDR_SPACE_FLASH4:
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case ADDR_SPACE_FLASH5:
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if (AVR_HAVE_ELPMX)
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avr_asm_len ("elpm %6,%a1+", xop, plen, 1);
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@ -158,13 +158,13 @@ extern const avr_addrspace_t avr_addrspace[];
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enum
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{
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ADDR_SPACE_RAM,
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ADDR_SPACE_PGM,
|
||||
ADDR_SPACE_PGM1,
|
||||
ADDR_SPACE_PGM2,
|
||||
ADDR_SPACE_PGM3,
|
||||
ADDR_SPACE_PGM4,
|
||||
ADDR_SPACE_PGM5,
|
||||
ADDR_SPACE_PGMX
|
||||
ADDR_SPACE_FLASH,
|
||||
ADDR_SPACE_FLASH1,
|
||||
ADDR_SPACE_FLASH2,
|
||||
ADDR_SPACE_FLASH3,
|
||||
ADDR_SPACE_FLASH4,
|
||||
ADDR_SPACE_FLASH5,
|
||||
ADDR_SPACE_MEMX
|
||||
};
|
||||
|
||||
#define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
|
||||
|
|
|
|||
|
|
@ -367,7 +367,7 @@
|
|||
operands[3] = gen_rtx_REG (HImode, REG_Z);
|
||||
operands[2] = force_operand (XEXP (operands[1], 0), NULL_RTX);
|
||||
operands[1] = replace_equiv_address (operands[1], operands[3]);
|
||||
set_mem_addr_space (operands[1], ADDR_SPACE_PGM);
|
||||
set_mem_addr_space (operands[1], ADDR_SPACE_FLASH);
|
||||
})
|
||||
|
||||
(define_insn "load_<mode>_libgcc"
|
||||
|
|
@ -391,7 +391,7 @@
|
|||
(clobber (reg:HI REG_Z))]
|
||||
"can_create_pseudo_p()
|
||||
&& !avr_xload_libgcc_p (QImode)
|
||||
&& avr_mem_pgmx_p (operands[1])
|
||||
&& avr_mem_memx_p (operands[1])
|
||||
&& REG_P (XEXP (operands[1], 0))"
|
||||
{ gcc_unreachable(); }
|
||||
"&& 1"
|
||||
|
|
@ -416,7 +416,7 @@
|
|||
(clobber (reg:QI 21))
|
||||
(clobber (reg:HI REG_Z))]
|
||||
"can_create_pseudo_p()
|
||||
&& avr_mem_pgmx_p (operands[1])
|
||||
&& avr_mem_memx_p (operands[1])
|
||||
&& REG_P (XEXP (operands[1], 0))"
|
||||
{ gcc_unreachable(); }
|
||||
"&& 1"
|
||||
|
|
@ -442,7 +442,7 @@
|
|||
DONE;
|
||||
})
|
||||
|
||||
;; Move value from address space pgmx to a register
|
||||
;; Move value from address space memx to a register
|
||||
;; These insns must be prior to respective generic move insn.
|
||||
|
||||
(define_insn "xload_8"
|
||||
|
|
@ -495,7 +495,7 @@
|
|||
rtx dest = operands[0];
|
||||
rtx src = operands[1];
|
||||
|
||||
if (avr_mem_pgm_p (dest))
|
||||
if (avr_mem_flash_p (dest))
|
||||
DONE;
|
||||
|
||||
/* One of the operands has to be in a register. */
|
||||
|
|
@ -506,7 +506,7 @@
|
|||
operands[1] = src = copy_to_mode_reg (<MODE>mode, src);
|
||||
}
|
||||
|
||||
if (avr_mem_pgmx_p (src))
|
||||
if (avr_mem_memx_p (src))
|
||||
{
|
||||
rtx addr = XEXP (src, 0);
|
||||
|
||||
|
|
@ -682,7 +682,7 @@
|
|||
{
|
||||
rtx addr = XEXP (operands[1], 0);
|
||||
|
||||
if (!avr_mem_pgm_p (operands[1])
|
||||
if (!avr_mem_flash_p (operands[1])
|
||||
|| !REG_P (addr)
|
||||
|| reg_overlap_mentioned_p (addr, operands[0]))
|
||||
{
|
||||
|
|
|
|||
|
|
@ -57,17 +57,17 @@
|
|||
(and (match_code "const_int")
|
||||
(match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))")))
|
||||
|
||||
;; Return 1 if OP is a general operand not in program memory
|
||||
;; Return 1 if OP is a general operand not in flash memory
|
||||
(define_predicate "nop_general_operand"
|
||||
(and (match_operand 0 "general_operand")
|
||||
(match_test "!avr_mem_pgm_p (op)")))
|
||||
(match_test "!avr_mem_flash_p (op)")))
|
||||
|
||||
;; Return 1 if OP is an "ordinary" general operand, i.e. a general
|
||||
;; operand whose load is not handled by a libgcc call or ELPM.
|
||||
(define_predicate "nox_general_operand"
|
||||
(and (match_operand 0 "general_operand")
|
||||
(not (match_test "avr_load_libgcc_p (op)"))
|
||||
(not (match_test "avr_mem_pgmx_p (op)"))))
|
||||
(not (match_test "avr_mem_memx_p (op)"))))
|
||||
|
||||
;; Return 1 if OP is the zero constant for MODE.
|
||||
(define_predicate "const0_operand"
|
||||
|
|
|
|||
|
|
@ -1244,38 +1244,38 @@ needed to locate read-only data in flash memory
|
|||
without using (inline) assembler code.
|
||||
|
||||
@table @code
|
||||
@item __pgm
|
||||
@cindex @code{__pgm} AVR Named Address Spaces
|
||||
The @code{__pgm} qualifier will locate data in the
|
||||
@item __flash
|
||||
@cindex @code{__flash} AVR Named Address Spaces
|
||||
The @code{__flash} qualifier will locate data in the
|
||||
@code{.progmem.data} section. Data will be read using the @code{LPM}
|
||||
instruction. Pointers to this address space are 16 bits wide.
|
||||
|
||||
@item __pgm1
|
||||
@item __pgm2
|
||||
@item __pgm3
|
||||
@item __pgm4
|
||||
@item __pgm5
|
||||
@cindex @code{__pgm1} AVR Named Address Spaces
|
||||
@cindex @code{__pgm2} AVR Named Address Spaces
|
||||
@cindex @code{__pgm3} AVR Named Address Spaces
|
||||
@cindex @code{__pgm4} AVR Named Address Spaces
|
||||
@cindex @code{__pgm5} AVR Named Address Spaces
|
||||
@item __flash1
|
||||
@item __flash2
|
||||
@item __flash3
|
||||
@item __flash4
|
||||
@item __flash5
|
||||
@cindex @code{__flash1} AVR Named Address Spaces
|
||||
@cindex @code{__flash2} AVR Named Address Spaces
|
||||
@cindex @code{__flash3} AVR Named Address Spaces
|
||||
@cindex @code{__flash4} AVR Named Address Spaces
|
||||
@cindex @code{__flash5} AVR Named Address Spaces
|
||||
These are 16-bit address spaces locating data in section
|
||||
@code{.progmem@var{N}.data} where @var{N} refers to
|
||||
address space @code{__pgm@var{N}}.
|
||||
address space @code{__flash@var{N}}.
|
||||
The compiler will set the @code{RAMPZ} segment register approptiately
|
||||
before reading data by means of the @code{ELPM} instruction.
|
||||
|
||||
On devices with less 64@tie{}kiB flash segments as indicated by the address
|
||||
space, the compiler will cut down the segment number to a number the
|
||||
device actually supports. Counting starts at@tie{}@code{0}
|
||||
for space @code{__pgm}. For example, if you access address space
|
||||
@code{__pgm3} on an ATmega128 device with two 64@tie{}kiB flash segments,
|
||||
the compiler will generate a read from @code{__pgm1}, i.e.@: it
|
||||
for space @code{__flash}. For example, if you access address space
|
||||
@code{__flash3} on an ATmega128 device with two 64@tie{}kiB flash segments,
|
||||
the compiler will generate a read from @code{__flash1}, i.e.@: it
|
||||
will load @code{RAMPZ} with@tie{}@code{1} before reading.
|
||||
|
||||
@item __pgmx
|
||||
@cindex @code{__pgmx} AVR Named Address Spaces
|
||||
@item __memx
|
||||
@cindex @code{__memx} AVR Named Address Spaces
|
||||
This is a 24-bit address space that linearizes flash and RAM:
|
||||
If the high bit of the address is set, data is read from
|
||||
RAM using the lower two bytes as RAM address.
|
||||
|
|
@ -1288,7 +1288,7 @@ Objects in this address space will be located in @code{.progmem.data}.
|
|||
@b{Example}
|
||||
|
||||
@example
|
||||
char my_read (const __pgm char ** p)
|
||||
char my_read (const __flash char ** p)
|
||||
@{
|
||||
/* p is a pointer to RAM that points to a pointer to flash.
|
||||
The first indirection of p will read that flash pointer
|
||||
|
|
@ -1299,7 +1299,7 @@ char my_read (const __pgm char ** p)
|
|||
@}
|
||||
|
||||
/* Locate array[] in flash memory */
|
||||
const __pgm int array[] = @{ 3, 5, 7, 11, 13, 17, 19 @};
|
||||
const __flash int array[] = @{ 3, 5, 7, 11, 13, 17, 19 @};
|
||||
|
||||
int i = 1;
|
||||
|
||||
|
|
@ -1316,8 +1316,8 @@ The purpose is to facilitate testing if respective address space
|
|||
support is available or not:
|
||||
|
||||
@example
|
||||
#ifdef __PGM
|
||||
const __pgm int var = 1;
|
||||
#ifdef __FLASH
|
||||
const __flash int var = 1;
|
||||
|
||||
int read_i (void)
|
||||
@{
|
||||
|
|
@ -1332,7 +1332,7 @@ int read_i (void)
|
|||
@{
|
||||
return (int) pgm_read_word (&i);
|
||||
@}
|
||||
#endif /* __PGM */
|
||||
#endif /* __FLASH */
|
||||
@end example
|
||||
|
||||
Notice that attribute @ref{AVR Variable Attributes,@code{progmem}}
|
||||
|
|
@ -1347,13 +1347,13 @@ from @w{@uref{http://nongnu.org/avr-libc/user-manual,avr-libc}}.
|
|||
@itemize
|
||||
@item
|
||||
Reading across the 64@tie{}KiB section boundary of
|
||||
the @code{__pgm} or @code{__pgm@var{N}} address spaces
|
||||
the @code{__flash} or @code{__flash@var{N}} address spaces
|
||||
will show undefined behaviour. The only address space that
|
||||
supports reading across the 64@tie{}KiB flash segment boundaries is
|
||||
@code{__pgmx}.
|
||||
@code{__memx}.
|
||||
|
||||
@item
|
||||
If you use one if the @code{__pgm@var{N}} address spaces
|
||||
If you use one if the @code{__flash@var{N}} address spaces
|
||||
you will have to arrange your linker skript to locate the
|
||||
@code{.progmem@var{N}.data} sections according to your needs.
|
||||
|
||||
|
|
@ -1372,8 +1372,8 @@ Code like the following is not yet supported because of missing
|
|||
support in avr-binutils,
|
||||
see @w{@uref{http://sourceware.org/PR13503,PR13503}}.
|
||||
@example
|
||||
extern const __pgmx char foo;
|
||||
const __pgmx void *pfoo = &foo;
|
||||
extern const __memx char foo;
|
||||
const __memx void *pfoo = &foo;
|
||||
@end example
|
||||
The code will throw an assembler warning and the high byte of
|
||||
@code{pfoo} will be initialized with@tie{}@code{0}, i.e.@: the
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue