sourcebuild.texi (Effective-Target Keywords): Document sse_runtime, sse2_runtime.
gcc: * doc/sourcebuild.texi (Effective-Target Keywords): Document sse_runtime, sse2_runtime. gcc/testsuite: * lib/target-supports.exp (check_sse_os_support_available): New proc. (check_sse_hw_available): New proc. (check_effective_target_sse_runtime): New proc. (check_effective_target_sse2_runtime): New proc. * lib/fortran-torture.exp (get-fortran-torture-options): Only add -msse2 if check_sse_os_support_available. * g++.dg/vect/vect.exp: Only run -msse2 tests if check_sse_os_support_available. * gcc.dg/vect/vect.exp: Likewise. * gfortran.dg/vect/vect.exp: Likewise. * gcc.target/i386/sol2-check: Renamed to ... * gcc.target/i386/sse-os-support.h: ... this. (sol2_check): Renamed to ... (sse_os_support): ... this. Only test movss with xmm registers. * gcc.target/i386/sse-check.h: Reflect new header and function names. Removed ILL_INSN, ILL_INSN_LEN. * gcc.target/i386/sse2-check.h: Likewise. * gcc.target/i386/sse3-check.h: Likewise. * gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime. Removed cpuid.h, __get_cpuid test. * g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime. Removed cpuid.h, __get_cpuid test. * g++.dg/other/pr40446.C: Likewise. * gcc.dg/compat/union-m128-1_main.c: Likewise. * gcc.dg/compat/vector-1a_main.c: Likewise. * gcc.dg/compat/vector-2a_main.c: Likewise. * gcc.dg/pr36584.c: Likewise. * gcc.dg/pr37544.c: Likewise. * gcc.dg/torture/pr16104-1.c: Likewise. * gcc.dg/torture/stackalign/alloca-2.c: Likewise. * gcc.dg/torture/stackalign/alloca-3.c: Likewise. * gcc.dg/torture/stackalign/push-1.c: Likewise. * gcc.dg/torture/stackalign/vararg-3.c: Likewise. * gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test. * gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target sse2_runtime. * gcc.dg/torture/pr35771-2.c: Likewise. * gcc.dg/torture/pr35771-3.c: Likewise. * gcc.target/i386/pr39315-2.c: Likewise. * gcc.target/i386/pr39315-4.c: Likewise. * gcc.target/i386/vperm-v2df.c: Likewise. * gcc.target/i386/vperm-v2di.c: Likewise. * gcc.target/i386/vperm-v4si-1.c: Likewise. * gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target sse_runtime. From-SVN: r162295
This commit is contained in:
parent
44c9c01f8f
commit
39354b3b99
35 changed files with 188 additions and 208 deletions
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@ -1,3 +1,8 @@
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2010-07-19 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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* doc/sourcebuild.texi (Effective-Target Keywords): Document
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sse_runtime, sse2_runtime.
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2010-07-18 Richard Sandiford <rdsandiford@googlemail.com>
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* config/mips/mips.c (mips16_build_call_stub): Zero-extend the
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@ -11,22 +16,6 @@
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* config/pa/pa.h (CONSTANT_ALIGNMENT): Align strings to BITS_PER_WORD
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on all targets.
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Index: config/pa/pa.h
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===================================================================
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--- config/pa/pa.h (revision 162277)
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+++ config/pa/pa.h (working copy)
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@@ -316,8 +316,9 @@
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#define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
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/* Get around hp-ux assembler bug, and make strcpy of constants fast. */
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-#define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
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- ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
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+#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
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+ (TREE_CODE (EXP) == STRING_CST \
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+ && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
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/* Make arrays of chars word-aligned for the same reasons. */
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#define DATA_ALIGNMENT(TYPE, ALIGN) \
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2010-07-17 Bernd Schmidt <bernds@codesourcery.com>
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PR target/42235
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@ -1607,9 +1607,15 @@ Target supports FPU instructions.
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@item sse
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Target supports compiling @code{sse} instructions.
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@item sse_runtime
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Target supports the execution of @code{sse} instructions.
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@item sse2
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Target supports compiling @code{sse2} instructions.
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@item sse2_runtime
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Target supports the execution of @code{sse2} instructions.
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@item sync_char_short
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Target supports atomic operations on @code{char} and @code{short}.
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@ -1,3 +1,53 @@
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2010-07-19 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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* lib/target-supports.exp (check_sse_os_support_available): New
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proc.
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(check_sse_hw_available): New proc.
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(check_effective_target_sse_runtime): New proc.
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(check_effective_target_sse2_runtime): New proc.
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* lib/fortran-torture.exp (get-fortran-torture-options): Only add
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-msse2 if check_sse_os_support_available.
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* g++.dg/vect/vect.exp: Only run -msse2 tests if
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check_sse_os_support_available.
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* gcc.dg/vect/vect.exp: Likewise.
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* gfortran.dg/vect/vect.exp: Likewise.
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* gcc.target/i386/sol2-check: Renamed to ...
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* gcc.target/i386/sse-os-support.h: ... this.
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(sol2_check): Renamed to ...
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(sse_os_support): ... this.
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Only test movss with xmm registers.
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* gcc.target/i386/sse-check.h: Reflect new header and function names.
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Removed ILL_INSN, ILL_INSN_LEN.
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* gcc.target/i386/sse2-check.h: Likewise.
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* gcc.target/i386/sse3-check.h: Likewise.
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* gcc.dg/pr40550.c: Use dg-require-effective-target sse_runtime.
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Removed cpuid.h, __get_cpuid test.
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* g++.dg/other/i386-1.C: Use dg-require-effective-target sse2_runtime.
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Removed cpuid.h, __get_cpuid test.
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* g++.dg/other/pr40446.C: Likewise.
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* gcc.dg/compat/union-m128-1_main.c: Likewise.
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* gcc.dg/compat/vector-1a_main.c: Likewise.
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* gcc.dg/compat/vector-2a_main.c: Likewise.
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* gcc.dg/pr36584.c: Likewise.
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* gcc.dg/pr37544.c: Likewise.
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* gcc.dg/torture/pr16104-1.c: Likewise.
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* gcc.dg/torture/stackalign/alloca-2.c: Likewise.
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* gcc.dg/torture/stackalign/alloca-3.c: Likewise.
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* gcc.dg/torture/stackalign/push-1.c: Likewise.
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* gcc.dg/torture/stackalign/vararg-3.c: Likewise.
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* gcc.dg/torture/pr35771.h: Removed cpuid.h, __get_cpuid test.
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* gcc.dg/torture/pr35771-1.c: Use dg-require-effective-target
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sse2_runtime.
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* gcc.dg/torture/pr35771-2.c: Likewise.
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* gcc.dg/torture/pr35771-3.c: Likewise.
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* gcc.target/i386/pr39315-2.c: Likewise.
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* gcc.target/i386/pr39315-4.c: Likewise.
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* gcc.target/i386/vperm-v2df.c: Likewise.
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* gcc.target/i386/vperm-v2di.c: Likewise.
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* gcc.target/i386/vperm-v4si-1.c: Likewise.
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* gcc.target/i386/vperm-v4sf-1.c: Use dg-require-effective-target
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sse_runtime.
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2010-07-19 Paul Thomas <pault@gcc.gnu.org>
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PR fortran/44353
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@ -1,11 +1,10 @@
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/* { dg-do run { target i?86-*-* x86_64-*-* } } */
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/* { dg-options "-msse2" } */
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/* { dg-require-effective-target sse2 } */
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/* { dg-require-effective-target sse2_runtime } */
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#include <xmmintrin.h>
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#include "cpuid.h"
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static void
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sse2_test (void)
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{
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@ -25,14 +24,6 @@ sse2_test (void)
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int
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main ()
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{
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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/* Run SSE2 test only if host has SSE2 support. */
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if (edx & bit_SSE2)
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sse2_test ();
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sse2_test ();
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return 0;
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}
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@ -2,9 +2,9 @@
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// { dg-do run { target i?86-*-* x86_64-*-* } }
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// { dg-options "-O1 -msse2" }
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// { dg-require-effective-target sse2 }
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// { dg-require-effective-target sse2_runtime }
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#include <emmintrin.h>
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#include "cpuid.h"
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extern "C" void abort ();
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@ -34,14 +34,6 @@ sse2_test ()
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int
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main ()
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{
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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/* Run SSE2 test only if host has SSE2 support. */
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if (edx & bit_SSE2)
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sse2_test ();
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sse2_test ();
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return 0;
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}
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@ -79,7 +79,7 @@ if [istarget "powerpc-*paired*"] {
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return
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}
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lappend DEFAULT_VECTCFLAGS "-msse2"
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if [check_sse2_hw_available] {
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if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
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set dg-do-what-default run
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} else {
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set dg-do-what-default compile
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@ -1,8 +1,7 @@
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/* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */
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/* { dg-options "-O" } */
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/* { dg-require-effective-target sse2 } */
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#include "cpuid.h"
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/* { dg-require-effective-target sse2_runtime } */
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/* Test function argument passing. PR target/15301. */
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int
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main ()
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{
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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/* Run SSE vector test only if host has SSE2 support. */
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if (edx & bit_SSE2)
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union_m128_1_x ();
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union_m128_1_x ();
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exit (0);
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}
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@ -1,12 +1,11 @@
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/* { dg-skip-if "test SSE2 vector" { ! { i?86-*-* x86_64-*-* } } } */
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/* { dg-require-effective-target sse2 } */
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/* { dg-require-effective-target sse2_runtime } */
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/* Test compatibility of vector types: layout between separately-compiled
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modules, parameter passing, and function return. This test uses
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vectors of integer values. */
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#include "cpuid.h"
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extern void vector_1_x (void);
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extern void exit (int);
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int fails;
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int
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main ()
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{
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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/* Run SSE vector test only if host has SSE2 support. */
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if (edx & bit_SSE2)
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vector_1_x ();
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vector_1_x ();
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exit (0);
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}
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@ -1,12 +1,11 @@
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/* { dg-skip-if "test SSE2 support" { ! { i?86-*-* x86_64-*-* } } } */
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/* { dg-require-effective-target sse2 } */
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/* { dg-require-effective-target sse2_runtime } */
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/* Test compatibility of vector types: layout between separately-compiled
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modules, parameter passing, and function return. This test uses
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vectors of floating points values. */
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#include "cpuid.h"
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extern void vector_2_x (void);
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extern void exit (int);
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int fails;
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int
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main ()
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{
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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/* Run SSE vector test only if host has SSE2 support. */
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if (edx & bit_SSE2)
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vector_2_x ();
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vector_2_x ();
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exit (0);
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}
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@ -2,10 +2,7 @@
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/* { dg-options "-O2 -lm" } */
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/* { dg-options "-O2 -msse2 -mfpmath=sse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
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/* { dg-require-effective-target sse2 { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
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#ifdef __i386__
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#include "cpuid.h"
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#endif
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/* { dg-require-effective-target sse2_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
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extern double fabs (double);
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extern void abort (void);
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@ -263,16 +260,6 @@ main ()
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double roots[7];
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int nroots;
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#ifdef __i386__
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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if (!(edx & bit_SSE2))
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return 0;
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#endif
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nroots = sbisect (6, sseq, 0.0, 10000000.0, 5, 1, roots);
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if (nroots != 4)
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abort ();
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@ -2,10 +2,7 @@
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/* { dg-options "-O2" } */
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/* { dg-options "-O2 -msse2 -mtune=core2 -mfpmath=387" { target { i?86-*-* x86_64-*-* } } } */
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/* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */
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#ifdef __i386__
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#include "cpuid.h"
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#endif
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/* { dg-require-effective-target sse2_runtime { target { i?86-*-* x86_64-*-* } } } */
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extern void abort (void);
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@ -16,17 +13,6 @@ int main(void)
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int i;
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#ifdef __i386__
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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/* Run SSE2 test only if host has SSE2 support. */
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if (!(edx & bit_SSE2))
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return 0;
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#endif
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for (i = 0; i < 1000; i++)
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arr[i] = 4294967296.0 + (double)i;
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@ -1,10 +1,7 @@
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/* { dg-do run } */
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/* { dg-options "-msse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
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/* { dg-require-effective-target sse { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
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#ifdef __i386__
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#include "cpuid.h"
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#endif
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/* { dg-require-effective-target sse_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
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typedef float v2sf __attribute__ ((vector_size (2 * sizeof(float))));
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@ -18,18 +15,6 @@ static void test (void)
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int main ()
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{
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#ifdef __i386__
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
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if (!(edx & bit_SSE))
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return 0;
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#endif
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test ();
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return 0;
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}
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|
|
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@ -2,8 +2,7 @@
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/* { dg-do run { target i?86-*-* x86_64-*-* } } */
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/* { dg-options "-msse2" } */
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/* { dg-require-effective-target sse2 } */
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#include "cpuid.h"
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/* { dg-require-effective-target sse2_runtime } */
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extern void abort (void);
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|
@ -76,14 +75,6 @@ do_test (void)
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int
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main (void)
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{
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unsigned int eax, ebx, ecx, edx;
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if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
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return 0;
|
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|
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/* Run SSE2 test only if host has SSE2 support. */
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if (edx & bit_SSE2)
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do_test ();
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do_test ();
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return 0;
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}
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|
|
|
@ -1,6 +1,7 @@
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/* { dg-do run { target i?86-*-* x86_64-*-* } } */
|
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/* { dg-options "-msse2" } */
|
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/* { dg-require-effective-target sse2 } */
|
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/* { dg-require-effective-target sse2_runtime } */
|
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|
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typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
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|
|
|
@ -1,6 +1,7 @@
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/* { dg-do run { target i?86-*-* x86_64-*-* } } */
|
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/* { dg-options "-msse2" } */
|
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/* { dg-require-effective-target sse2 } */
|
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/* { dg-require-effective-target sse2_runtime } */
|
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|
||||
typedef double __m128d __attribute__ ((__vector_size__ (16), __may_alias__));
|
||||
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
/* { dg-do run { target i?86-*-* x86_64-*-* } } */
|
||||
/* { dg-options "-msse2" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
|
||||
typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
|
||||
|
||||
|
|
|
@ -1,7 +1,5 @@
|
|||
typedef TYPE __attribute__((aligned(1))) unaligned;
|
||||
|
||||
#include "cpuid.h"
|
||||
|
||||
extern void abort (void);
|
||||
|
||||
|
||||
|
@ -27,14 +25,6 @@ do_test (void)
|
|||
int
|
||||
main (void)
|
||||
{
|
||||
unsigned int eax, ebx, ecx, edx;
|
||||
|
||||
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
||||
return 0;
|
||||
|
||||
/* Run SSE2 test only if host has SSE2 support. */
|
||||
if (edx & bit_SSE2)
|
||||
do_test ();
|
||||
|
||||
do_test ();
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -2,9 +2,9 @@
|
|||
/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
|
||||
/* { dg-options "-msse2" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
|
||||
#include <emmintrin.h>
|
||||
#include "cpuid.h"
|
||||
#include "check.h"
|
||||
|
||||
#ifndef ALIGNMENT
|
||||
|
@ -44,14 +44,7 @@ int
|
|||
main (void)
|
||||
{
|
||||
__m128 x = { 1.0 };
|
||||
unsigned int eax, ebx, ecx, edx;
|
||||
|
||||
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
||||
return 0;
|
||||
|
||||
/* Run SSE2 test only if host has SSE2 support. */
|
||||
if (edx & bit_SSE2)
|
||||
foo (x, x, x, 5);
|
||||
foo (x, x, x, 5);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -2,9 +2,9 @@
|
|||
/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
|
||||
/* { dg-options "-msse2" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
|
||||
#include <emmintrin.h>
|
||||
#include "cpuid.h"
|
||||
#include "check.h"
|
||||
|
||||
#ifndef ALIGNMENT
|
||||
|
@ -44,14 +44,7 @@ int
|
|||
main (void)
|
||||
{
|
||||
__m128 x = { 1.0 };
|
||||
unsigned int eax, ebx, ecx, edx;
|
||||
|
||||
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
||||
return 0;
|
||||
|
||||
/* Run SSE2 test only if host has SSE2 support. */
|
||||
if (edx & bit_SSE2)
|
||||
foo (x, x, x, x, 5);
|
||||
foo (x, x, x, x, 5);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -2,9 +2,9 @@
|
|||
/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
|
||||
/* { dg-options "-msse2 -mpreferred-stack-boundary=2" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
|
||||
#include <emmintrin.h>
|
||||
#include "cpuid.h"
|
||||
|
||||
typedef __PTRDIFF_TYPE__ ptrdiff_t;
|
||||
typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
|
||||
|
@ -42,19 +42,11 @@ int
|
|||
main (void)
|
||||
{
|
||||
__m128 x = { 1.0 };
|
||||
unsigned int eax, ebx, ecx, edx;
|
||||
|
||||
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
||||
return 0;
|
||||
|
||||
/* Run SSE2 test only if host has SSE2 support. */
|
||||
if (edx & bit_SSE2)
|
||||
{
|
||||
foo (x, x, x, x, 5);
|
||||
foo (x, x, x, x, 5);
|
||||
|
||||
if (__builtin_memcmp (&r, &x, sizeof (r)))
|
||||
abort ();
|
||||
}
|
||||
if (__builtin_memcmp (&r, &x, sizeof (r)))
|
||||
abort ();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -2,10 +2,10 @@
|
|||
/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
|
||||
/* { dg-options "-msse2" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
|
||||
#include <stdarg.h>
|
||||
#include <emmintrin.h>
|
||||
#include "cpuid.h"
|
||||
#include "check.h"
|
||||
|
||||
#ifndef ALIGNMENT
|
||||
|
@ -72,14 +72,8 @@ int
|
|||
main (void)
|
||||
{
|
||||
__m128 x = { 1.0 };
|
||||
unsigned int eax, ebx, ecx, edx;
|
||||
|
||||
if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
||||
return 0;
|
||||
|
||||
/* Run SSE2 test only if host has SSE2 support. */
|
||||
if (edx & bit_SSE2)
|
||||
foo ("foo", 5, 5.0, x);
|
||||
foo ("foo", 5, 5.0, x);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -71,7 +71,7 @@ if [istarget "powerpc-*paired*"] {
|
|||
return
|
||||
}
|
||||
lappend DEFAULT_VECTCFLAGS "-msse2"
|
||||
if [check_sse2_hw_available] {
|
||||
if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
|
||||
set dg-do-what-default run
|
||||
} else {
|
||||
set dg-do-what-default compile
|
||||
|
|
|
@ -2,6 +2,7 @@
|
|||
/* { dg-do run } */
|
||||
/* { dg-options "-O -msse2 -mtune=generic" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
/* { dg-additional-sources pr39315-check.c } */
|
||||
|
||||
typedef float __m128 __attribute__ ((__vector_size__ (16)));
|
||||
|
|
|
@ -2,6 +2,7 @@
|
|||
/* { dg-do run } */
|
||||
/* { dg-options "-O -msse2 -mtune=generic" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
/* { dg-additional-sources pr39315-check.c } */
|
||||
|
||||
typedef float __m128 __attribute__ ((__vector_size__ (16)));
|
||||
|
|
|
@ -1,13 +1,7 @@
|
|||
#include <stdlib.h>
|
||||
#include "m128-check.h"
|
||||
|
||||
#include "cpuid.h"
|
||||
|
||||
/* We need a single SSE instruction here so the handler can safely skip
|
||||
over it. */
|
||||
#define ILL_INSN __asm__ volatile ("movss %xmm2,%xmm1")
|
||||
#define ILL_INSN_LEN 4
|
||||
#include "sol2-check.h"
|
||||
#include "sse-os-support.h"
|
||||
|
||||
static void sse_test (void);
|
||||
|
||||
|
@ -27,7 +21,7 @@ main ()
|
|||
return 0;
|
||||
|
||||
/* Run SSE test only if host has SSE support. */
|
||||
if ((edx & bit_SSE) && sol2_check ())
|
||||
if ((edx & bit_SSE) && sse_os_support ())
|
||||
do_test ();
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -14,18 +14,23 @@ sigill_hdlr (int sig __attribute((unused)),
|
|||
sigill_caught = 1;
|
||||
/* Set PC to the instruction after the faulting one to skip over it,
|
||||
otherwise we enter an infinite loop. */
|
||||
ucp->uc_mcontext.gregs[EIP] += ILL_INSN_LEN;
|
||||
ucp->uc_mcontext.gregs[EIP] += 4;
|
||||
setcontext (ucp);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Solaris 2 before Solaris 9 4/04 cannot execute SSE/SSE2 instructions
|
||||
even if the CPU supports them. Programs receive SIGILL instead, so
|
||||
check for that at runtime. */
|
||||
/* Check if the OS supports executing SSE instructions. This function is
|
||||
only used in sse-check.h, sse2-check.h, and sse3-check.h so far since
|
||||
Solaris 8 and 9 won't run on newer CPUs anyway. */
|
||||
|
||||
static int
|
||||
sol2_check (void)
|
||||
sse_os_support (void)
|
||||
{
|
||||
#if defined(__sun__) && defined(__svr4__)
|
||||
/* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions
|
||||
even if the CPU supports them. Programs receive SIGILL instead, so
|
||||
check for that at runtime. */
|
||||
|
||||
struct sigaction act, oact;
|
||||
|
||||
act.sa_handler = sigill_hdlr;
|
||||
|
@ -34,7 +39,9 @@ sol2_check (void)
|
|||
act.sa_flags = SA_SIGINFO;
|
||||
sigaction (SIGILL, &act, &oact);
|
||||
|
||||
ILL_INSN;
|
||||
/* We need a single SSE instruction here so the handler can safely skip
|
||||
over it. */
|
||||
__asm__ volatile ("movss %xmm2,%xmm1");
|
||||
|
||||
sigaction (SIGILL, &oact, NULL);
|
||||
|
|
@ -1,12 +1,7 @@
|
|||
#include <stdlib.h>
|
||||
#include "cpuid.h"
|
||||
#include "m128-check.h"
|
||||
|
||||
/* We need a single SSE2 instruction here so the handler can safely skip
|
||||
over it. */
|
||||
#define ILL_INSN __asm__ volatile ("unpcklpd %xmm0,%xmm2")
|
||||
#define ILL_INSN_LEN 4
|
||||
#include "sol2-check.h"
|
||||
#include "sse-os-support.h"
|
||||
|
||||
static void sse2_test (void);
|
||||
|
||||
|
@ -26,7 +21,7 @@ main ()
|
|||
return 0;
|
||||
|
||||
/* Run SSE2 test only if host has SSE2 support. */
|
||||
if ((edx & bit_SSE2) && sol2_check ())
|
||||
if ((edx & bit_SSE2) && sse_os_support ())
|
||||
do_test ();
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -1,13 +1,7 @@
|
|||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "cpuid.h"
|
||||
|
||||
/* We need a single SSE3 instruction here so the handler can safely skip
|
||||
over it. */
|
||||
#define ILL_INSN __asm__ volatile ("movddup %xmm1,%xmm2")
|
||||
#define ILL_INSN_LEN 4
|
||||
#include "sol2-check.h"
|
||||
#include "sse-os-support.h"
|
||||
|
||||
static void sse3_test (void);
|
||||
|
||||
|
@ -27,7 +21,7 @@ main ()
|
|||
return 0;
|
||||
|
||||
/* Run SSE3 test only if host has SSE3 support. */
|
||||
if ((ecx & bit_SSE3) && sol2_check ())
|
||||
if ((ecx & bit_SSE3) && sse_os_support ())
|
||||
do_test ();
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
/* { dg-do run } */
|
||||
/* { dg-options "-O -msse2" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
|
||||
#include "isa-check.h"
|
||||
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
/* { dg-do run } */
|
||||
/* { dg-options "-O -msse2" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
|
||||
#include "isa-check.h"
|
||||
|
||||
|
|
|
@ -1,5 +1,7 @@
|
|||
/* { dg-do run } */
|
||||
/* { dg-options "-O -msse" } */
|
||||
/* { dg-require-effective-target sse } */
|
||||
/* { dg-require-effective-target sse_runtime } */
|
||||
|
||||
#include "isa-check.h"
|
||||
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
/* { dg-do run } */
|
||||
/* { dg-options "-O -msse2" } */
|
||||
/* { dg-require-effective-target sse2 } */
|
||||
/* { dg-require-effective-target sse2_runtime } */
|
||||
|
||||
#include "isa-check.h"
|
||||
|
||||
|
|
|
@ -72,7 +72,7 @@ if [istarget "powerpc-*paired*"] {
|
|||
return
|
||||
}
|
||||
lappend DEFAULT_VECTCFLAGS "-msse2"
|
||||
if [check_sse2_hw_available] {
|
||||
if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
|
||||
set dg-do-what-default run
|
||||
} else {
|
||||
set dg-do-what-default compile
|
||||
|
|
|
@ -46,7 +46,8 @@ proc get-fortran-torture-options { } {
|
|||
set test_tree_vectorize 1
|
||||
} elseif { ( [istarget "i?86-*-*"] || [istarget "x86_64-*-*"] )
|
||||
&& [check_effective_target_sse2]
|
||||
&& [check_sse2_hw_available] } {
|
||||
&& [check_sse2_hw_available]
|
||||
&& [check_sse_os_support_available] } {
|
||||
lappend vectorizer_options "-msse2"
|
||||
set test_tree_vectorize 1
|
||||
} elseif { [istarget "mips*-*-*"]
|
||||
|
|
|
@ -910,6 +910,53 @@ proc check_750cl_hw_available { } {
|
|||
}]
|
||||
}
|
||||
|
||||
# Return 1 if the target OS supports running SSE executables, 0
|
||||
# otherwise. Cache the result.
|
||||
|
||||
proc check_sse_os_support_available { } {
|
||||
return [check_cached_effective_target sse_os_support_available {
|
||||
# If this is not the right target then we can skip the test.
|
||||
if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
|
||||
expr 0
|
||||
} elseif { [istarget i?86-*-solaris2*] } {
|
||||
# The Solaris 2 kernel doesn't save and restore SSE registers
|
||||
# before Solaris 9 4/04. Before that, executables die with SIGILL.
|
||||
check_runtime_nocache sse_os_support_available {
|
||||
int main ()
|
||||
{
|
||||
__asm__ volatile ("movss %xmm2,%xmm1");
|
||||
return 0;
|
||||
}
|
||||
} "-msse"
|
||||
} else {
|
||||
expr 1
|
||||
}
|
||||
}]
|
||||
}
|
||||
|
||||
# Return 1 if the target supports executing SSE instructions, 0
|
||||
# otherwise. Cache the result.
|
||||
|
||||
proc check_sse_hw_available { } {
|
||||
return [check_cached_effective_target sse_hw_available {
|
||||
# If this is not the right target then we can skip the test.
|
||||
if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
|
||||
expr 0
|
||||
} else {
|
||||
check_runtime_nocache sse_hw_available {
|
||||
#include "cpuid.h"
|
||||
int main ()
|
||||
{
|
||||
unsigned int eax, ebx, ecx, edx = 0;
|
||||
if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
||||
return !(edx & bit_SSE);
|
||||
return 1;
|
||||
}
|
||||
} ""
|
||||
}
|
||||
}]
|
||||
}
|
||||
|
||||
# Return 1 if the target supports executing SSE2 instructions, 0
|
||||
# otherwise. Cache the result.
|
||||
|
||||
|
@ -933,6 +980,26 @@ proc check_sse2_hw_available { } {
|
|||
}]
|
||||
}
|
||||
|
||||
# Return 1 if the target supports running SSE executables, 0 otherwise.
|
||||
|
||||
proc check_effective_target_sse_runtime { } {
|
||||
if { [check_sse_hw_available] && [check_sse_os_support_available] } {
|
||||
return 1
|
||||
} else {
|
||||
return 0
|
||||
}
|
||||
}
|
||||
|
||||
# Return 1 if the target supports running SSE2 executables, 0 otherwise.
|
||||
|
||||
proc check_effective_target_sse2_runtime { } {
|
||||
if { [check_sse2_hw_available] && [check_sse_os_support_available] } {
|
||||
return 1
|
||||
} else {
|
||||
return 0
|
||||
}
|
||||
}
|
||||
|
||||
# Return 1 if the target supports executing VSX instructions, 0
|
||||
# otherwise. Cache the result.
|
||||
|
||||
|
|
Loading…
Add table
Reference in a new issue