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target/119010 - add missing DF load/store reservations for znver4 and znver5

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The following resolves missing reservations for DFmode *movdf_internal
loads and stores, visible as 'nothing' in -fsched-verbose=2 dumps.

	PR target/119010
	* config/i386/zn4zn5.md (znver4_sse_mov_fp, znver4_sse_mov_fp_load,
	znver5_sse_mov_fp_load, znver4_sse_mov_fp_store,
	znver5_sse_mov_fp_store): Also match V1SF and DF.
This commit is contained in:
Richard Biener 2025-03-25 15:18:14 +01:00 • committed by Richard Biener
parent c3a704df22
commit 36925b413e
1 changed files with 5 additions and 5 deletions
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10
gcc/config/i386/zn4zn5.md
View file

@ -1012,35 +1012,35 @@
(define_insn_reservation "znver4_sse_mov_fp" 1
(and (eq_attr "cpu" "znver4,znver5")
(and (eq_attr "type" "ssemov")
(and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF")
(and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,DF,SF")
(eq_attr "memory" "none"))))
"znver4-direct,znver4-fpu")
(define_insn_reservation "znver4_sse_mov_fp_load" 6
(and (eq_attr "cpu" "znver4")
(and (eq_attr "type" "ssemov")
(and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF")
(and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,DF,SF")
(eq_attr "memory" "load"))))
"znver4-direct,znver4-load,znver4-fpu")
(define_insn_reservation "znver5_sse_mov_fp_load" 6
(and (eq_attr "cpu" "znver5")
(and (eq_attr "type" "ssemov")
(and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF")
(and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,DF,SF")
(eq_attr "memory" "load"))))
"znver4-direct,znver5-load,znver4-fpu")
(define_insn_reservation "znver4_sse_mov_fp_store" 1
(and (eq_attr "cpu" "znver4")
(and (eq_attr "type" "ssemov")
(and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF")
(and (eq_attr "mode" "V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,DF,SF")
(eq_attr "memory" "store"))))
"znver4-direct,znver4-fp-store")
(define_insn_reservation "znver5_sse_mov_fp_store" 1
(and (eq_attr "cpu" "znver5")
(and (eq_attr "type" "ssemov")
(and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,SF")
(and (eq_attr "mode" "V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,DF,SF")
(eq_attr "memory" "store"))))
"znver4-direct,znver5-fp-store256")