i386: Add V2DFmode conversion functions [PR95046]
gcc/ChangeLog: PR target/95046 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1. (floatv2siv2df2): New expander. (floatunsv2siv2df2): New insn pattern. (fix_truncv2dfv2si2): New expander. (fixuns_truncv2dfv2si2): New insn pattern. testsuite/ChangeLog: PR target/95046 * gcc.target/i386/pr95046-6.c: New test.
This commit is contained in:
Uros Bizjak
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2c814af65e
commit
365e3cde49
4 changed files with 96 additions and 6 deletions
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@ -1,3 +1,14 @@
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2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
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PR target/95046
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* config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
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(floatv2siv2df2): New expander.
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(floatunsv2siv2df2): New insn pattern.
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(fix_truncv2dfv2si2): New expander.
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(fixuns_truncv2dfv2si2): New insn pattern.
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2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
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PR target/95105
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@ -37,7 +48,7 @@
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cfun->curr_properties has PROP_gimple_any bit set.
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(struct omp_declare_variant_entry): New type.
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(struct omp_declare_variant_base_entry): New type.
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(struct omp_declare_variant_hasher): New type.
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(struct omp_declare_variant_hasher): New type.
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(omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
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New methods.
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(omp_declare_variants): New variable.
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@ -75,19 +86,19 @@
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2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
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PR target/95046
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* config/i386/mmx.md (mmx_fix_truncv2sfv2si2): rename from mmx_pf2id.
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* config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
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Add SSE/AVX alternative. Change operand predicates from
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nonimmediate_operand to register_mmxmem_operand.
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Enable instruction pattern for TARGET_MMX_WITH_SSE.
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(fix_truncv2sfv2si2): New expander.
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(fixuns_truncv2sfv2si2): Ditto.
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(fixuns_truncv2sfv2si2): New insn pattern.
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(mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
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Add SSE/AVX alternative. Change operand predicates from
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nonimmediate_operand to register_mmxmem_operand.
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Enable instruction pattern for TARGET_MMX_WITH_SSE.
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(floatv2siv2sf2): New expander.
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(floatunsv2siv2sf2): Ditto.
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(floatunsv2siv2sf2): New insn pattern.
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* config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
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Update for rename.
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@ -5532,8 +5532,8 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(define_insn "sse2_cvtpi2pd"
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[(set (match_operand:V2DF 0 "register_operand" "=v,x")
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(float:V2DF (match_operand:V2SI 1 "nonimmediate_operand" "vBm,?!y")))]
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[(set (match_operand:V2DF 0 "register_operand" "=v,?!x")
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(float:V2DF (match_operand:V2SI 1 "nonimmediate_operand" "vBm,yBm")))]
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"TARGET_SSE2"
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"@
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%vcvtdq2pd\t{%1, %0|%0, %1}
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@ -5545,6 +5545,21 @@
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(set_attr "prefix" "maybe_vex,*")
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(set_attr "mode" "V2DF")])
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(define_expand "floatv2siv2df2"
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[(set (match_operand:V2DF 0 "register_operand")
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(float:V2DF (match_operand:V2SI 1 "nonimmediate_operand")))]
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"TARGET_MMX_WITH_SSE")
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(define_insn "floatunsv2siv2df2"
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[(set (match_operand:V2DF 0 "register_operand" "=v")
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(unsigned_float:V2DF
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(match_operand:V2SI 1 "nonimmediate_operand" "vm")))]
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"TARGET_MMX_WITH_SSE && TARGET_AVX512VL"
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"vcvtudq2pd\t{%1, %0|%0, %1}"
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[(set_attr "type" "ssecvt")
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(set_attr "prefix" "evex")
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(set_attr "mode" "V2DF")])
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(define_insn "sse2_cvtpd2pi"
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[(set (match_operand:V2SI 0 "register_operand" "=v,?!y")
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(unspec:V2SI [(match_operand:V2DF 1 "vector_operand" "vBm,xBm")]
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@ -5580,6 +5595,21 @@
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(set_attr "prefix" "maybe_vex,*")
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(set_attr "mode" "TI")])
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(define_expand "fix_truncv2dfv2si2"
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[(set (match_operand:V2SI 0 "register_operand")
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(fix:V2SI (match_operand:V2DF 1 "vector_operand")))]
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"TARGET_MMX_WITH_SSE")
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(define_insn "fixuns_truncv2dfv2si2"
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[(set (match_operand:V2SI 0 "register_operand" "=v")
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(unsigned_fix:V2SI
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(match_operand:V2DF 1 "nonimmediate_operand" "vm")))]
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"TARGET_MMX_WITH_SSE && TARGET_AVX512VL"
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"vcvttpd2udq{x}\t{%1, %0|%0, %1}"
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[(set_attr "type" "ssecvt")
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(set_attr "prefix" "evex")
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(set_attr "mode" "TI")])
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(define_insn "sse2_cvtsi2sd"
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[(set (match_operand:V2DF 0 "register_operand" "=x,x,v")
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(vec_merge:V2DF
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@ -1,3 +1,8 @@
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2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
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PR target/95046
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* gcc.target/i386/pr95046-6.c: New test.
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2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
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PR target/95105
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44
gcc/testsuite/gcc.target/i386/pr95046-6.c
Normal file
44
gcc/testsuite/gcc.target/i386/pr95046-6.c
Normal file
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@ -0,0 +1,44 @@
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/* PR target/95046 */
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/* { dg-do compile { target { ! ia32 } } } */
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/* { dg-options "-O3 -mavx512vl" } */
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double r[2];
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int s[2];
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unsigned int u[2];
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void
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test_float (void)
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{
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for (int i = 0; i < 2; i++)
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r[i] = s[i];
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}
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/* { dg-final { scan-assembler "\tvcvtdq2pd" } } */
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void
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test_ufloat (void)
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{
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for (int i = 0; i < 2; i++)
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r[i] = u[i];
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}
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/* { dg-final { scan-assembler "\tvcvtudq2pd" } } */
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void
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test_fix (void)
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{
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for (int i = 0; i < 2; i++)
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s[i] = r[i];
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}
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/* { dg-final { scan-assembler "\tvcvttpd2dqx" } } */
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void
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test_ufix (void)
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{
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for (int i = 0; i < 2; i++)
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u[i] = r[i];
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}
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/* { dg-final { scan-assembler "\tvcvttpd2udqx" } } */
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