re PR target/52483 (SH Target: Loads from volatile memory leave redundant sign/zero extensions)
PR target/52483 * config/sh/predicates.md (general_movdst_operand): Allow reg+reg addressing, do not use general_operand for memory operands. PR target/52483 * gcc.target/sh/pr52483-1.c: Add tests for memory stores. * gcc.target/sh/pr52483-2.c: Likewise. * gcc.target/sh/pr52483-3.c: Likewise. * gcc.target/sh/pr52483-4.c: Likewise. From-SVN: r204097
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Oleg Endo
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a6f623d4fa
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35d1b0838c
7 changed files with 156 additions and 24 deletions
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@ -1,3 +1,9 @@
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2013-10-26 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/52483
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* config/sh/predicates.md (general_movdst_operand): Allow reg+reg
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addressing, do not use general_operand for memory operands.
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2013-10-26 Vladimir Makarov <vmakarov@redhat.com>
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Revert:
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@ -550,17 +550,36 @@
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&& ! (reload_in_progress || reload_completed))
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return 0;
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if ((mode == QImode || mode == HImode)
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&& mode == GET_MODE (op)
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&& (MEM_P (op)
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|| (GET_CODE (op) == SUBREG && MEM_P (SUBREG_REG (op)))))
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if (mode == GET_MODE (op)
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&& (MEM_P (op) || (GET_CODE (op) == SUBREG && MEM_P (SUBREG_REG (op)))))
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{
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rtx x = XEXP ((MEM_P (op) ? op : SUBREG_REG (op)), 0);
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rtx mem_rtx = MEM_P (op) ? op : SUBREG_REG (op);
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rtx x = XEXP (mem_rtx, 0);
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if (GET_CODE (x) == PLUS
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if ((mode == QImode || mode == HImode)
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&& GET_CODE (x) == PLUS
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&& REG_P (XEXP (x, 0))
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&& CONST_INT_P (XEXP (x, 1)))
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return sh_legitimate_index_p (mode, XEXP (x, 1), TARGET_SH2A, false);
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/* Allow reg+reg addressing here without validating the register
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numbers. Usually one of the regs must be R0 or a pseudo reg.
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In some cases it can happen that arguments from hard regs are
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propagated directly into address expressions. In this cases reload
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will have to fix it up later. However, allow this only for native
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1, 2 or 4 byte addresses. */
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if (can_create_pseudo_p () && GET_CODE (x) == PLUS
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&& GET_MODE_SIZE (mode) <= 4
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&& REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1)))
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return true;
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/* 'general_operand' does not allow volatile mems during RTL expansion to
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avoid matching arithmetic that operates on mems, it seems.
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On SH this leads to redundant sign extensions for QImode or HImode
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stores. Thus we mimic the behavior but allow volatile mems. */
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if (memory_address_addr_space_p (GET_MODE (mem_rtx), x,
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MEM_ADDR_SPACE (mem_rtx)))
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return true;
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}
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return general_operand (op, mode);
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@ -1,3 +1,11 @@
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2013-10-26 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/52483
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* gcc.target/sh/pr52483-1.c: Add tests for memory stores.
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* gcc.target/sh/pr52483-2.c: Likewise.
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* gcc.target/sh/pr52483-3.c: Likewise.
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* gcc.target/sh/pr52483-4.c: Likewise.
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2013-10-26 Jeff Law <law@redhat.com>
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* g++.dg/torture/pr49309.C: Removed.
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@ -1,9 +1,9 @@
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/* Check that loads from volatile mems don't result in redundant sign
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extensions. */
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/* Check that loads/stores from/to volatile mems don't result in redundant
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sign/zero extensions. */
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/* { dg-do compile { target "sh*-*-*" } } */
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/* { dg-options "-O1" } */
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/* { dg-options "-O2" } */
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/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
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/* { dg-final { scan-assembler-not "exts" } } */
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/* { dg-final { scan-assembler-not "exts|extu" } } */
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int
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test_00 (volatile char* x)
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@ -11,20 +11,44 @@ test_00 (volatile char* x)
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return *x;
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}
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void
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test_100 (volatile char* x, char y)
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{
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*x = y;
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}
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int
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test_01 (volatile short* x)
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{
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return *x;
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}
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void
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test_101 (volatile unsigned char* x, unsigned char y)
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{
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*x = y;
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}
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int
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test_02 (volatile unsigned char* x)
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{
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return *x == 0x80;
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}
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void
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test_102 (volatile short* x, short y)
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{
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*x = y;
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}
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int
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test_03 (volatile unsigned short* x)
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{
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return *x == 0xFF80;
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}
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void
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test_103 (volatile unsigned short* x, unsigned short y)
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{
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*x = y;
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}
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@ -1,14 +1,15 @@
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/* Check that loads from volatile mems utilize displacement addressing
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modes and do not result in redundant sign extensions. */
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/* Check that loads/stores from/to volatile mems utilize displacement
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addressing modes and do not result in redundant sign/zero extensions. */
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/* { dg-do compile { target "sh*-*-*" } } */
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/* { dg-options "-O1" } */
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/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
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/* { dg-final { scan-assembler-times "@\\(5," 2 } } */
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/* { dg-final { scan-assembler-times "@\\(10," 2 } } */
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/* { dg-final { scan-assembler-times "@\\(20," 2 } } */
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/* { dg-final { scan-assembler-times "@\\(40," 2 } } */
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/* { dg-final { scan-assembler-times "@\\(44," 2 } } */
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/* { dg-final { scan-assembler-times "@\\(5," 4 } } */
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/* { dg-final { scan-assembler-times "@\\(10," 4 } } */
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/* { dg-final { scan-assembler-times "@\\(20," 4 } } */
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/* { dg-final { scan-assembler-times "@\\(40," 4 } } */
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/* { dg-final { scan-assembler-times "@\\(44," 4 } } */
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/* { dg-final { scan-assembler-not "exts" } } */
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/* { dg-final { scan-assembler-times "extu|movu" 2 } } */
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int
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test_00 (volatile char* x)
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@ -16,35 +17,73 @@ test_00 (volatile char* x)
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return x[5];
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}
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void
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test_100 (volatile char* x, char y)
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{
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x[5] = y;
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}
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int
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test_01 (volatile short* x)
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{
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return x[5];
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}
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void
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test_101 (volatile short* x, short y)
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{
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x[5] = y;
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}
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int
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test_02 (volatile int* x)
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{
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return x[5];
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}
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void
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test_102 (volatile int* x, int y)
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{
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x[5] = y;
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}
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long long
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test_03 (volatile long long* x)
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{
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return x[5];
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}
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void
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test_103 (volatile long long* x, long long y)
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{
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x[5] = y;
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}
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unsigned int
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test_04 (volatile unsigned char* x)
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{
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// expected 1x extu.b or movu.b
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return x[5];
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}
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void
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test_104 (volatile unsigned char* x, unsigned char y)
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{
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x[5] = y;
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}
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unsigned int
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test_05 (volatile unsigned short* x)
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{
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// expected 1x extu.w or movu.w
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return x[5];
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}
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void
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test_105 (volatile unsigned short* x, unsigned short y)
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{
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x[5] = y;
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}
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unsigned int
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test_06 (volatile unsigned int* x)
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return x[5];
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}
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void
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test_106 (volatile unsigned int* x, unsigned int y)
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{
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x[5] = y;
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}
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unsigned long long
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test_07 (volatile unsigned long long* x)
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{
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return x[5];
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}
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void
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test_107 (volatile unsigned long long* x, unsigned long long y)
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{
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x[5] = y;
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}
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@ -1,10 +1,10 @@
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/* Check that loads from volatile mems utilize indexed addressing
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modes and do not result in redundant sign extensions. */
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/* Check that loads/stores from/to volatile mems utilize indexed addressing
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modes and do not result in redundant sign/zero extensions. */
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/* { dg-do compile { target "sh*-*-*" } } */
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/* { dg-options "-O1" } */
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/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
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/* { dg-final { scan-assembler-times "@\\(r0," 3 } } */
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/* { dg-final { scan-assembler-not "exts" } } */
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/* { dg-final { scan-assembler-times "@\\(r0," 6 } } */
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/* { dg-final { scan-assembler-not "exts|extu" } } */
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int
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test_00 (volatile char* x, unsigned int y)
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return x[y];
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}
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void
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test_100 (volatile char* x, unsigned int y, char z)
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{
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x[y] = z;
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}
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int
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test_01 (volatile short* x, unsigned int y)
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{
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return x[y];
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}
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void
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test_101 (volatile short* x, unsigned int y, short z)
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{
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x[y] = z;
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}
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int
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test_02 (volatile int* x, unsigned int y)
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{
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return x[y];
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}
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int
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test_102 (volatile int* x, unsigned int y, int z)
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{
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x[y] = z;
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}
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/* Check that loads from volatile floating point mems utilize indexed
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addressing modes. */
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/* Check that loads/stores from/to volatile floating point mems utilize
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indexed addressing modes. */
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/* { dg-do compile { target "sh*-*-*" } } */
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/* { dg-options "-O1" } */
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/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */
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/* { dg-final { scan-assembler-times "@\\(r0," 1 } } */
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/* { dg-final { scan-assembler-times "@\\(r0," 2 } } */
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float
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test_00 (volatile float* x, unsigned int y)
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{
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return x[y];
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}
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void
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test_100 (volatile float* x, unsigned int y, float z)
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{
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x[y] = z;
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}
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