From 33066c903a614f948a2657c7aa3090067f5984a5 Mon Sep 17 00:00:00 2001 From: liuhongt Date: Mon, 4 Sep 2023 13:16:11 +0800 Subject: [PATCH] Generate vmovsh instead of vpblendw for specific vec_merge. On SPR, vmovsh can be execute on 3 ports, vpblendw can only be executed on 2 ports. On znver4, vpblendw can be executed on 4 ports, if vmovsh is similar as vmovss, then it can also be executed on 4 ports. So there's no difference for znver? but vmovsh is more optimized on SPR. gcc/ChangeLog: * config/i386/sse.md: (V8BFH_128): Renamed to .. (VHFBF_128): .. this. (V16BFH_256): Renamed to .. (VHFBF_256): .. this. (avx512f_mov): Extend to V_128. (vcvtnee2ps_): Changed to VHFBF_128. (vcvtneo2ps_): Ditto. (vcvtnee2ps_): Changed to VHFBF_256. (vcvtneo2ps_): Ditto. * config/i386/i386-expand.cc (expand_vec_perm_blend): Canonicalize vec_merge. gcc/testsuite/ChangeLog: * gcc.target/i386/avx512fp16-vmovsh-1a.c: Remove xfail. --- gcc/config/i386/i386-expand.cc | 17 +++++++++++++ gcc/config/i386/sse.md | 25 ++++++++----------- .../gcc.target/i386/avx512fp16-vmovsh-1a.c | 2 +- 3 files changed, 29 insertions(+), 15 deletions(-) diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index cbd51a0f362..e42ff27c6ef 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -19433,6 +19433,23 @@ expand_vec_perm_blend (struct expand_vec_perm_d *d) mmode = VOIDmode; } + /* Canonicalize vec_merge. */ + if (swap_commutative_operands_p (op1, op0) + /* Two operands have same precedence, then + first bit of mask select first operand. */ + || (!swap_commutative_operands_p (op0, op1) + && !(mask & 1))) + { + unsigned n_elts = GET_MODE_NUNITS (vmode); + std::swap (op0, op1); + unsigned HOST_WIDE_INT mask_all = HOST_WIDE_INT_1U; + if (n_elts == HOST_BITS_PER_WIDE_INT) + mask_all = -1; + else + mask_all = (HOST_WIDE_INT_1U << n_elts) - 1; + mask = ~mask & mask_all; + } + if (mmode != VOIDmode) maskop = force_reg (mmode, gen_int_mode (mask, mmode)); else diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index e282d978a01..6d3ae8dea0c 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -459,8 +459,9 @@ (define_mode_iterator VF1_AVX512VL [V16SF (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")]) -(define_mode_iterator VHFBF - [V32HF V16HF V8HF V32BF V16BF V8BF]) +(define_mode_iterator VHFBF [V32HF V16HF V8HF V32BF V16BF V8BF]) +(define_mode_iterator VHFBF_256 [V16HF V16BF]) +(define_mode_iterator VHFBF_128 [V8HF V8BF]) (define_mode_iterator VHF_AVX512VL [V32HF (V16HF "TARGET_AVX512VL") (V8HF "TARGET_AVX512VL")]) @@ -11134,13 +11135,11 @@ DONE; }) -(define_mode_iterator V8BFH_128 [V8HF V8BF]) - (define_insn "avx512fp16_mov" - [(set (match_operand:V8BFH_128 0 "register_operand" "=v") - (vec_merge:V8BFH_128 - (match_operand:V8BFH_128 2 "register_operand" "v") - (match_operand:V8BFH_128 1 "register_operand" "v") + [(set (match_operand:V8_128 0 "register_operand" "=v") + (vec_merge:V8_128 + (match_operand:V8_128 2 "register_operand" "v") + (match_operand:V8_128 1 "register_operand" "v") (const_int 1)))] "TARGET_AVX512FP16" "vmovsh\t{%2, %1, %0|%0, %1, %2}" @@ -30358,8 +30357,6 @@ [(set_attr "prefix" "vex") (set_attr "mode" "")]) -(define_mode_iterator V16BFH_256 [V16HF V16BF]) - (define_mode_attr bf16_ph [(V8HF "ph") (V16HF "ph") (V8BF "bf16") (V16BF "bf16")]) @@ -30368,7 +30365,7 @@ [(set (match_operand:V4SF 0 "register_operand" "=x") (float_extend:V4SF (vec_select: - (match_operand:V8BFH_128 1 "memory_operand" "m") + (match_operand:VHFBF_128 1 "memory_operand" "m") (parallel [(const_int 0) (const_int 2) (const_int 4) (const_int 6)]))))] "TARGET_AVXNECONVERT" @@ -30380,7 +30377,7 @@ [(set (match_operand:V8SF 0 "register_operand" "=x") (float_extend:V8SF (vec_select: - (match_operand:V16BFH_256 1 "memory_operand" "m") + (match_operand:VHFBF_256 1 "memory_operand" "m") (parallel [(const_int 0) (const_int 2) (const_int 4) (const_int 6) (const_int 8) (const_int 10) @@ -30394,7 +30391,7 @@ [(set (match_operand:V4SF 0 "register_operand" "=x") (float_extend:V4SF (vec_select: - (match_operand:V8BFH_128 1 "memory_operand" "m") + (match_operand:VHFBF_128 1 "memory_operand" "m") (parallel [(const_int 1) (const_int 3) (const_int 5) (const_int 7)]))))] "TARGET_AVXNECONVERT" @@ -30406,7 +30403,7 @@ [(set (match_operand:V8SF 0 "register_operand" "=x") (float_extend:V8SF (vec_select: - (match_operand:V16BFH_256 1 "memory_operand" "m") + (match_operand:VHFBF_256 1 "memory_operand" "m") (parallel [(const_int 1) (const_int 3) (const_int 5) (const_int 7) (const_int 9) (const_int 11) diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c index 38bf5cc0395..ba10096aa20 100644 --- a/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c +++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vmovsh-1a.c @@ -3,7 +3,7 @@ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+\[^\n\r\]*%\[er\]\[ad]x+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^z\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vmovsh\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */