diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c9720b839f6..c9e23ddc630 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+Fri Jun 25 13:41:25 1999  David Edelsohn  <edelsohn@gnu.org>
+
+	* rs6000.c (output_toc): Always use hex values for floating-point
+	constants.  Store single-precision values in upper-half of TOC
+	entry in 64-bit mode.
+	* rs6000.md (floatsidf2, floatunssidf2): Add !TARGET_POWERPC64
+	to final constraints.
+	(fix_truncdfsi2 splitter): Change pattern matching fctiwz.
+	(fctiwz): Improve accuracy of RTL for pattern.
+
 Fri Jun 25 11:26:38 1999  Gavin Romig-Koch  <gavin@cygnus.com>
 
 	* expr.c (expand_expr): Allow RTL_EXPR's through the 
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 7d6faf5cb6c..ee3c2f761a0 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -4729,6 +4729,7 @@ output_toc (file, x, labelno)
 
       REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
       REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
+
       if (TARGET_64BIT)
 	{
 	  if (TARGET_MINIMAL_TOC)
@@ -4741,9 +4742,9 @@ output_toc (file, x, labelno)
       else
 	{
 	  if (TARGET_MINIMAL_TOC)
-	    fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]);
+	    fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n", k[0], k[1]);
 	  else
-	    fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
+	    fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n",
 		     k[0], k[1], k[0], k[1]);
 	  return;
 	}
@@ -4757,11 +4758,22 @@ output_toc (file, x, labelno)
       REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
       REAL_VALUE_TO_TARGET_SINGLE (rv, l);
 
-      if (TARGET_MINIMAL_TOC)
-	fprintf (file, TARGET_32BIT ? "\t.long %ld\n" : "\t.llong %ld\n", l);
+      if (TARGET_64BIT)
+	{
+	  if (TARGET_MINIMAL_TOC)
+	    fprintf (file, "\t.llong 0x%lx00000000\n", l);
+	  else
+	    fprintf (file, "\t.tc FS_%lx[TC],0x%lx00000000\n", l, l);
+	  return;
+	}
       else
-	fprintf (file, "\t.tc FS_%lx[TC],%ld\n", l, l);
-      return;
+	{
+	  if (TARGET_MINIMAL_TOC)
+	    fprintf (file, "\t.long 0x%lx\n", l);
+	  else
+	    fprintf (file, "\t.tc FS_%lx[TC],0x%lx\n", l, l);
+	  return;
+	}
     }
   else if (GET_MODE (x) == DImode
 	   && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index a74b139ff08..c2749f8222f 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -4079,7 +4079,7 @@
 	      (clobber (match_dup 4))
 	      (clobber (match_dup 5))
 	      (clobber (reg:DF 76))])]
-  "TARGET_HARD_FLOAT"
+  "! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
   "
 {
   operands[2] = force_reg (SImode, GEN_INT (0x43300000));
@@ -4096,7 +4096,7 @@
    (clobber (match_operand:SI 4 "gpc_reg_operand" "=r"))
    (clobber (match_operand 5 "gpc_reg_operand" "=b"))
    (clobber (reg:DF 76))]
-  "TARGET_HARD_FLOAT"
+  "! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
   "#"
   [(set_attr "length" "24")])
 
@@ -4108,7 +4108,7 @@
    (clobber (match_operand:SI 4 "gpc_reg_operand" ""))
    (clobber (match_operand 5 "gpc_reg_operand" ""))
    (clobber (reg:DF 76))]
-  "TARGET_HARD_FLOAT"
+  "! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
   [(set (match_dup 4)
 	(xor:SI (match_dup 1)
 		(match_dup 6)))
@@ -4140,7 +4140,7 @@
 	      (use (match_dup 3))
 	      (clobber (match_dup 4))
 	      (clobber (reg:DF 76))])]
-  "TARGET_HARD_FLOAT"
+  "! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
   "
 {
   operands[2] = force_reg (SImode, GEN_INT (0x43300000));
@@ -4155,7 +4155,7 @@
    (use (match_operand:DF 3 "gpc_reg_operand" "f"))
    (clobber (match_operand 4 "gpc_reg_operand" "=b"))
    (clobber (reg:DF 76))]
-  "TARGET_HARD_FLOAT"
+  "! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
   "#"
   [(set_attr "length" "20")])
 
@@ -4166,7 +4166,7 @@
    (use (match_operand:DF 3 "gpc_reg_operand" ""))
    (clobber (match_operand 4 "gpc_reg_operand" ""))
    (clobber (reg:DF 76))]
-  "TARGET_HARD_FLOAT"
+  "! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
   [(set (match_dup 4)
 	(unspec [(const_int 0)] 11))
    (set (match_dup 5)
@@ -4294,7 +4294,7 @@
   "TARGET_HARD_FLOAT"
   "
 {
-  if (!TARGET_POWER2 && !TARGET_POWERPC)
+  if (! TARGET_POWER2 && ! TARGET_POWERPC)
     {
       emit_insn (gen_trunc_call (operands[0], operands[1],
 				 gen_rtx_SYMBOL_REF (Pmode, RS6000_ITRUNC)));
@@ -4323,8 +4323,8 @@
    (clobber (match_operand 3 "gpc_reg_operand" ""))
    (clobber (reg:DI 76))]
   "TARGET_HARD_FLOAT"
-  [(set (match_dup 2)
-	(sign_extend:DI (fix:SI (match_operand:DF 1 "gpc_reg_operand" ""))))
+  [(set (subreg:SI (match_dup 2) 0)
+	(fix:SI (match_operand:DF 1 "gpc_reg_operand" "")))
    (set (match_dup 3)
 	(unspec [(const_int 0)] 11))
    (set (match_dup 4)
@@ -4433,8 +4433,8 @@
 }")
 
 (define_insn "*fctiwz"
-  [(set (match_operand:DI 0 "gpc_reg_operand" "=f")
-	(sign_extend:DI (fix:SI (match_operand:DF 1 "gpc_reg_operand" "f"))))]
+  [(set (subreg:SI (match_operand:DI 0 "gpc_reg_operand" "=f") 0)
+	(fix:SI (match_operand:DF 1 "gpc_reg_operand" "f")))]
   "(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT"
   "{fcirz|fctiwz} %0,%1"
   [(set_attr "type" "fp")])
@@ -9151,7 +9151,7 @@
 	(lshiftrt:SI (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r")))
 		     (const_int 31)))
    (clobber (match_scratch:SI 2 "=&r"))]
-  "!TARGET_POWER"
+  "! TARGET_POWER"
   "{ai|addic} %2,%1,-1\;{sfe|subfe} %0,%2,%1"
   [(set_attr "length" "8")])