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re PR tree-optimization/86066 (wrong code for bit-field manipulation at -Os)

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PR tree-optimization/86066
	* gimple-ssa-store-merging.c (process_store): Do not bypass BIT_NOT_EXPR
	for BIT_INSERT_EXPR stores.

From-SVN: r261232
This commit is contained in:
Eric Botcazou 2018-06-06 13:13:24 +00:00 • committed by Eric Botcazou
parent 1abc0f7f52
commit 31a5d8c538
4 changed files with 33 additions and 1 deletions
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6
gcc/ChangeLog
View file

@ -1,3 +1,9 @@
2018-06-06 Eric Botcazou <ebotcazou@adacore.com>
PR tree-optimization/86066
* gimple-ssa-store-merging.c (process_store): Do not bypass BIT_NOT_EXPR
for BIT_INSERT_EXPR stores.
2018-06-06 Richard Biener <rguenther@suse.de>
PR tree-optimization/86062

5
gcc/gimple-ssa-store-merging.c
View file

@ -4333,7 +4333,9 @@ pass_store_merging::process_store (gimple *stmt)
&& const_bitsize <= 64)
{
/* Bypass a conversion to the bit-field type. */
if (is_gimple_assign (def_stmt) && CONVERT_EXPR_CODE_P (rhs_code))
if (!bit_not_p
&& is_gimple_assign (def_stmt)
&& CONVERT_EXPR_CODE_P (rhs_code))
{
tree rhs1 = gimple_assign_rhs1 (def_stmt);
if (TREE_CODE (rhs1) == SSA_NAME
@ -4341,6 +4343,7 @@ pass_store_merging::process_store (gimple *stmt)
rhs = rhs1;
}
rhs_code = BIT_INSERT_EXPR;
bit_not_p = false;
ops[0].val = rhs;
ops[0].base_addr = NULL_TREE;
ops[1].base_addr = NULL_TREE;

4
gcc/testsuite/ChangeLog
View file

@ -1,3 +1,7 @@
2018-06-06 Eric Botcazou <ebotcazou@adacore.com>
* gcc.dg/torture/pr86066.c: New test.
2018-06-06 Richard Biener <rguenther@suse.de>
PR tree-optimization/86062

19
gcc/testsuite/gcc.dg/torture/pr86066.c Normal file
View file

@ -0,0 +1,19 @@
/* PR tree-optimization/86066 */
/* Testcase by Zhendong Su <Zhendong Su> */
struct A
{
int b:2;
int c:2;
unsigned d:8;
};
int main ()
{
struct A t = { 0, 0, 2 };
L:
t.d = ~(~(~0 % t.d) % 2);
if (!t.d)
goto L;
return 0;
}